Investigation into the impact of component floor plan layout on the overall reliability of electronics systems in harsh environments

Braden, Derek R.; Yang, Ryan S.H.; Duralek, Janusz; Zhang, Guangming; Harvey, David M.

doi:10.1109/estc.2010.5642969

Cited by 7 publications

(7 citation statements)

References 2 publications

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“…The monitoring result was verified by using FE analysis prediction calculated from work by Braden et al (2010). The analysis prediction was analysed using a non‐linear 3D finite model run on the ABAQUES FE simulation software platform from Simulia.…”

Section: Monitoring Resultsmentioning

confidence: 99%

“…Flip chip on board assembly has been widely used in high‐reliability product applications such as those required by the automotive, aerospace and defence industries. For automotive applications, flip chip solder interconnections are often known as the weakest link in terms of product reliability (Braden et al , 2010). This is mainly caused by the high coefficient of thermal expansion mismatch between the silicon die and organic substrate during extreme environmental operations such as thermal cycling (Lau, 1996; Yan et al , 2006).…”

Section: Introductionmentioning

confidence: 99%

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Through lifetime monitoring of solder joints using acoustic micro imaging

Yang

Braden

Zhang

et al. 2012

Soldering &Amp; Surface Mount Technology

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PurposeThe purpose of this paper is to evaluate the application of an acoustic micro‐imaging (AMI) inspection technique in monitoring solder joints through lifetime performance and demonstrate the robustness of the monitoring through analysis of AMI data.Design/methodology/approachAccelerated thermal cycling (ATC) test data on a flip chip test board were collected through AMI imaging. Subsequently, informative features and parameters of solder joints in acoustic images were measured and analysed. Through analysing histogram distance, mean intensity and grey area of the solder joints in acoustic images, cracks between the solder bump and chip interface were tracked and monitored. The results are in accord with associated Finite Element (FE) prediction.FindingsAt defective bumps, the formation of a crack causes a larger acoustic impedance mismatch which provides a stronger ultrasound reflection. The intensity of solder joints in the acoustic image increase according to the level of damage during the ATC tests. By analysing the variation of intensity and area, solder joint fatigue failure was monitored. A failure distribution plot shows a normal distribution pattern, where corner joints have the lowest reliability and are more likely to fail first. A strong agreement between AMI monitoring test data and FE prediction was observed, demonstrating the feasibility of through lifetime monitoring of solder joints using AMI.Originality/valueThe paper indicates the feasibility of the novel application of AMI inspection to monitor solder joint through lifetime performance non‐destructively. Solder joints' real life conditions can be tracked by an AMI technique, hence solder joint fatigue failure cycles during the ATC tests can be monitored and analysed non‐destructively.

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Section: Monitoring Resultsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Through lifetime monitoring of solder joints using acoustic micro imaging

Yang

Braden

Zhang

et al. 2012

Soldering &Amp; Surface Mount Technology

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“…Moreover, test boards were not representative of circuit board assembly (CBA) constraints or dynamic mechanical interactions between component i.e. dual side component placement which is known to significantly reduce reliability life as studied in previous work by the authors [1] [2] [3].…”

Section: Evaluation Of Commercial Off the Shelf (Cots)mentioning

confidence: 99%

Aligning component and system qualification testing through prognostics

Braden

Harvey

2014

Proceedings of the 5th Electronics System-Integration Technology Conference (ESTC)

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There is a continual growth of test and validation in high reliability product applications such as automotive, military and avionics. Principally this is driven by increased use and complexity of electronic systems installed in vehicles in addition to increased end user reliability expectations. Furthermore product development cycles continue to reduce, resulting in less available time to perform accelerated life tests. Moreover, significant increases in test duration are observed as a direct result of raised reliability expectations. The challenge for automotive electronic suppliers in particular is performing life tests in shorter periods of time whilst reducing the overall associated costs of validation testing.The dichotomy is that reliability testing at the component level does not replicate the intended mission environment. Often this can result in disputes between component suppliers and end users. The focus for many component suppliers is on the thermal performance of devices, but real applications require other factors to be considered, such as manufacturing influences during circuit board manufacture and assembly, mechanical stresses and device interactions. Furthermore, previous work by the authors suggests that interconnect and system level reliability is significantly impacted by component layout and constraint points which are application specific [1] [2] [3].In this paper, a review of suitable prognostic techniques is undertaken and an approach proposed in which reliability testing results at component level matches more closely that undertaken at system level.

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“…causes of electronic failure by the U.S. Air force [5] and solder interconnects usually are the weakest link in terms of product reliability [6]. Therefore, solder joint reliability testing is necessary to understand the effects of high-frequency vibration, particularly for any manufactured electronics that are prone to encounter harsh environments in practice [7].…”

mentioning

confidence: 99%

“…However, none of these studies attempted to conduct real-time vibration tests or were able to monitor the exact dynamics of manufactured solder joint reliability. Solder joint reliability, which is greatly affected by the component's floor plan, the thickness of the printed circuit board (PCB), and the influence of the surrounding components [6], has never been fully studied before. A previous article has investigated the effects of floor plan layout on through-life PCB reliability when considering thermal cycling effects [11].…”

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confidence: 99%

Investigation Into How the Floor Plan Layout of a Manufactured PCB Influences Flip-Chip Susceptibility to Vibration

Baishya

Harvey

Zhang

et al. 2020

IEEE Trans. Compon., Packag. Manufact. Technol.

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This article investigates how floor plan layout of a printed circuit board (PCB) influences the reliability of the component's solder joint connections when operated in a vibrating environment. A random vibration profile as seen in an automotive environment was used in full lifetime tests. An industry-standard FR4 PCB with electroless nickel immersion gold (ENIG) surface finish was manufactured with double-sided component placement including 14 flip chips, eight on the top side and six on the bottom side. Ultrasound scans were used as a nondestructive test to assess the integrity of solder joints from manufacture to failure. This enabled monitoring of the important interface between solder joints and flip chip where failure mostly occurs. The initial failure pattern was found by experiment where 86 cycles of random vibration caused all flip chips to mechanically fail. Failure followed a Weibull probability with a value of β = 1.297, indicating that failure rates increase with time. The results show that the reliability of a flip chip varies with its position on a PCB with some marked differences to component lifetimes. The results also show that for two-sided flip-chip placements on a PCB, backto-back, overlapped, and single-sided orientations have subtle effects on flip-chip lifetimes. Similarly, reliability varied with solder joint positions since joints on the sides of a flip chip nearest the PCB edges were less reliable than those on sides on a flip chip furthest away. Finally, design guidelines are offered to effect the most reliable flip-chip placement on a two-sided PCB when operated in a vibrating environment.

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Investigation into the impact of component floor plan layout on the overall reliability of electronics systems in harsh environments

Cited by 7 publications

References 2 publications

Through lifetime monitoring of solder joints using acoustic micro imaging

Through lifetime monitoring of solder joints using acoustic micro imaging

Aligning component and system qualification testing through prognostics

Investigation Into How the Floor Plan Layout of a Manufactured PCB Influences Flip-Chip Susceptibility to Vibration

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