Investigation of Endurance Degradation in a CTF NOR Array Using Charge Pumping Methods

Abstract

The NOR-type SONOS memory devices used in this study were fabricated using a standard 0.35 μm complementary-metaloxide-semiconductor (CMOS) technology. In these devices, the We investigate the effect of interface states on the endurance of a charge trap flash (CTF) NOR array using charge pumping methods. The endurance test was completed from one cell selected randomly from 128 bit cells, where the memory window value after 10 2 program/erase (P/E) cycles decreased slightly from 2.2 V to 1.7 V. However, the memory window closure abruptly accelerated after 10 3 P/E cycles or more (i.e. 0.97 V or 0.7 V) due to a degraded programming speed. On the other hand, the interface trap density (Nit) gradually increased from 3.13×10 11 cm -2 for the initial state to 4×10 12 cm -2 for 10 2 P/E cycles. Over 10 3 P/E cycles, the Nit increased dramatically from 5.51×10 12 cm -2 for 10 3 P/E cycles to 5.79×10 12 cm -2 for 10 4 P/E cycles due to tunnel oxide damages. These results show good correlation between the interface traps and endurance degradation of CTF devices in actual flash cell arrays. Ho-Myoung An