2023
DOI: 10.1109/ted.2023.3265913
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Investigation of Endurance Degradation Mechanism of Si FeFET With HfZrO Ferroelectric by an In Situ Vth Measurement

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Cited by 6 publications
(2 citation statements)
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“…The impact of film thickness and annealing temperature on HZO films has been investigated and addressed in these benchmarks. In the subsequent benchmark, a comparative analysis is conducted between the current study on HZO with a thickness of less than 10 nm and other relevant works in the field. …”
Section: Resultsmentioning
confidence: 99%
“…The impact of film thickness and annealing temperature on HZO films has been investigated and addressed in these benchmarks. In the subsequent benchmark, a comparative analysis is conducted between the current study on HZO with a thickness of less than 10 nm and other relevant works in the field. …”
Section: Resultsmentioning
confidence: 99%
“…11 Moreover, the endurance measurement of FeFET in programming and erasing memory states subject the device to positive and negative gate bias stress, resulting in lattice structure damage and impacting endurance characteristics. [12][13][14][15] To address these issues and enhance the endurance of FeFET, this work presents ferroelectric thin-film transistors (FeTFTs) with an asymmetric dual-gate (DG) structure. The use of DG operation helps mitigate the degradation effects induced by electrical stress on the device, 16,17 thereby improving the memory endurance of FeTFT.…”
mentioning
confidence: 99%