Investigation of Hump Degradation by F-N stress for Narrow Width n-MOSFETs with Shallow Trench Isolation (STI)

Abstract

To understand relationship between hump degradation and FN stress, we have investigated FN stress induced damage process in this paper. We have found that sub-threshold hump increase could be caused by edge hole trap along the STI/Si interface. The surprising degradation of double-hump is observed depending on the bias-temperature stress. The FN stress induced transistor hump makes the off leakage current (I off ) and degradation of memory device performance

Effect of dynamic stress on off leakage of small-dimension pMOSFETs at high temperature

“…Electrons are being trapped at the silicon nitride layer of the STI near the drain, which produces negative N ox . The trapped N ox lowers the V th of parasitic transistor [26][27][28][29][30] (Fig. 6).…”