Investigation of reactive ion etching of dielectrics and Si in CHF3∕O2 or CHF3∕Ar for photovoltaic applications

Abstract

Using a combination of etch rate, photoconductance, and deep level transient spectroscopy ͑DLTS͒ measurements, the authors have investigated the use of reactive ion etching ͑RIE͒ of dielectrics and Si in CHF 3 /O 2 and CHF 3 / Ar plasmas for photovoltaic applications. The radio frequency power ͑rf-power͒ and gas flow rate dependencies have shown that the addition of either O 2 or Ar to CHF 3 can be used effectively to change the etch selectivity between SiO 2 and Si 3 N 4. The effective carrier lifetime of samples degraded upon exposure to a CHF 3-based plasma, reflecting the introduction of recombination centers in the near-surface region. The extent of minority carrier lifetime degradation was similar in both types of plasmas, suggesting that the same defects were responsible for the increased recombination. However, the rf-power dependence of lifetime degradation in n-and p-type Si was different. Moreover, the lifetime degradation did not exhibit a linear rf-power dependence, suggesting that primary defects were not the dominant recombination centers responsible for the decrease in lifetime. Indeed, DLTS measurements have shown that secondary defects were formed in samples exposed to the plasma after annealing at 400°C, the temperature at which a SiN:H layer is deposited on samples to passivate their surfaces. The minority carrier lifetime degradation in RIE processed samples could be partially avoided using post-RIE chemical treatments.

A protective layer on As2S3 film for photo-resist patterning

“…2(b)) and this can be important in reducing the surface scattering loss of the fabricated waveguide. A low LER of the patterned PR resulted from employing the BARC as well as teflon-like polymer passivation on the sidewall in CHF 3 plasma [9]. The details of this issue will be dealt in a forthcoming paper.…”

Influence of Etching-Induced Surface Damage on Device Performance With Consideration of Minority Carriers Within Diffusion Length From Depletion Edge

“…It is noted that for etching substrate, as shown in Fig. 2(a), S g,eff is different from typical surface recombination velocity S g at Si/SiO 2 interface since it involves the component of carrier diffusion from all of the outer depletion regions, where the effective carrier lifetime is degraded by surface defects [7], [15], [16]. For RIE-induced interface traps, the various density distributions in energy throughout the silicon bandgap lead to the complexity in calculating S g .…”

“…For example, interface traps along the channel of MOSFETs result in the reduction of drive current and the increase of leakage current as well as power consumption [13], [14]. Besides, it was found that the generation lifetime was degraded by RIE using pulsed metal-oxidesemiconductor (MOS) capacitance method [7], [15]- [17]. It is well known that interface traps either under gate or within depletion region from the gate edge contribute to gate current by generation-recombination process [14], [18].…”

Effect of Cryogenic Dry Etching on Minority Charge Carrier Lifetime in Silicon

“…However, it is well known that the interaction with plasma potentiality could induce the degradation of silicon substrate during the dry etching process . During RIE, high‐energy ions from the plasma attack the silicon surface and create a subsurface defect region in the depth of several microns . In a previous study, a detailed study of silicon surface damage caused by RIE has been investigated.…”