Investigation of smart power DMOS devices under repetitive stress conditions using transient thermal mapping and numerical simulation

Modeling of terminal ring structures for high-voltage power MOSFETs

“…The high BV extends the operation voltage range while the low R on increases the operation current and reduces the switching loss. To achieve a high breakdown voltage with reasonable silicon area, power MOS transistors are normally implemented using the vertically-diffusion MOS (VDMOS) or its modified structures and the device characteristics have been intensely studied over the years [1][2][3][4][5]. However, low R on and high BV are still two contradicting requirements in the VDMOS structures [1].…”