Investigation of the Degradation Mechanism of SiC MOSFET Subjected to Multiple Stresses

Abstract

The performance requirements for power devices in airborne equipment are increasingly demanding, while environmental and working stresses are becoming more diverse. The degradation mechanisms of devices subjected to multiple stresses become more complex. Most proposed degradation mechanisms and models in current research only consider a single stress, making it difficult to describe the correlation between multiple stresses and the correlation of failures. Then, a multi-physical field coupling model based on COMSOL is proposed. The influence relationship between temperature, moisture, electrical load, and vibration during device operation is considered, and a three-dimensional finite element model is built to investigate the multi-stress degradation mechanism under multi-physical field coupling. The simulation results show that, compared with single-stress models, the proposed multi-stress coupled model can more accurately simulate the degradation process of SiC MOSFET. This provides references for improving the reliability design of power device packaging.

Delamination of Plasticized Devices in Dynamic Service Environments

“…Nguyen et al [ 42 ] tested the piezoresistive sensor test chip at 65% RH, 65 °C; 85% RH, 85 °C; and 95% RH, 95 °C; the study found that the maximum mass increment was up to 139 mg and the maximum stress was 37 MPa. Dong et al [ 43 ] utilized an electro-thermal–wet coupling model to realize stress coupling under thermal cycling and wet expansion, and the results showed that the coupled stress of the silicon chip increased by 2.6 MPa to 26.361 MPa after the introduction of wet expansion compared to thermal stress alone ( Figure 3 a). Wang [ 27 ] chose the virtual crack closure technique (VCCT) to introduce the effect of CTE–CHS–vapor pressure superposition on the delamination of two-phase interfaces for simulation; it was found that the strain energy release rates produced by hygroscopic loading G h and vapor pressure loading G p were similar in magnitude to those produced by thermal loading G t ( Figure 3 c,d).…”

“…The results show that the strain due to hygroscopic expansion is comparable to thermal expansion at 0~55 °C or 150~175 °C at 60 °C and 60% RH. Dong et al [ 43 ] investigated the joint effects of temperature cycling and moisture expansion on silicon chips using the coupled electric–thermal–humidity model. The results showed that the stress of the chip increased by 2.6 MPa when moisture expansion was taken into account.…”

“…Reprinted from Ref. [ 43 ], with open access from MDPI. ( b ) Increase in sample length (hygroscopic swelling) versus time at 30, 60, and 80 °C and 60% RH.…”