Investigation on hot carrier effects in n-type short-channel junctionless nanowire transistors

Impact of Hot Carrier Aging on the Performance of Triple-Gate Junctionless MOSFETs

“…UNCTIONLESS (JL) multi-gate transistors have attracted much attention due to their high immunity to short channel effects (SCEs) and fabrication process simplification without requiring a complicated process to form the source/drain junctions [1]. In addition, the bulk conduction in JL transistors results in improved reliability, compared to the surface conduction of inversion mode (IM) transistors [2]. The high impact ionization rate in the drain region of n-channel JL nanowire MOSFETs [3], led to the investigation of their hot carrier (HC) degradation mechanisms.…”

“…The high impact ionization rate in the drain region of n-channel JL nanowire MOSFETs [3], led to the investigation of their hot carrier (HC) degradation mechanisms. However, HC studies in JL multi-gate MOSFETs are limited to few works, referred on investigation of HC effects in triple-gate (TG) JL MOSFETs [4]- [6] and gate-all-around (GAA) JL nanowires [7]- [9]. Therefore, investigation of HC-induced degradation mechanisms in nanoscale JL multi-gate MOSFETs is a very important topic, since HC effect is a severe reliability issue in increasingly scaled transistors.…”

“…In JL GAA MOSFETs, the HC degradation under on-state stress conditions is higher in relation to the off-state stress conditions due to the higher density of carriers confined in the center of the nanowire [8]. In p-channel TG JL MOSFETs the worst device degradation occurred at gate voltage V g = V t where V t is the threshold voltage [5], whereas in n-channel transistors the worse device degradation occurred at drain voltage V d = V g [7], [8]. However, in conventional MOSFETs stressing at V d /V g ratio of bias conditions different than the worst case stress conditions, revealed new Si-H bond breaking mechanisms for interface states creation (such as, single-carrier process, multiple-carrier process, electronelectron scattering, dipole-field interaction, dispersion of Si-H bond energy) [10], [11].…”

Triple-gate junctionless MOSFETs

“…transistors [39], [186]- [191]. The less significance of the HC effects in JL transistors is due to the lower intensity of the lateral electric field and its location: in the IM transistors the peak of the electric field is located underneath the gate near the edge of the drain region, whereas in JL transistors it is located within the drain region [39], [186]- [188].…”

“…However, HC studies in JL multi-gate MOSFETs are limited to few works, referred on investigation of HC effects in triple-gate (TG) JL MOSFETs [187], [188] and GAA JL nanowires [189]- [191]. Therefore, investigation of HC-induced degradation mechanisms in nanoscale JL multi-gate MOSFETs is a very important topic, since HC effect is a severe reliability issue in increasingly scaled transistors.…”