(Invited) An Ultra-Low Insertion Loss T/R switch fully integrated with 802.11b/g/n transceiver in 90nm CMOS

Kidwai, A.A.; Fu, Chang-Tsung; Sadhwani, R.; Chu, Dan; Jensen, J.F.; Taylor, S.S.

doi:10.1109/rfic.2008.4561443

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Cited by 8 publications

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“…The LCresonance technique can further be exploited to eliminate the large voltage swing across transistors during transmission [5], [6]. When integrated with an LNA and PA, this technique can improve performance significantly [7], [8].…”

Section: Introductionmentioning

confidence: 99%

A 5-GHz, 30-dBm, 0.9-dB insertion loss single-pole double-throw T/R switch in 90nm CMOS

Taylor

Kuo

2008

2008 IEEE Radio Frequency Integrated Circuits Symposium

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A 5GHz, 30-dBm CMOS T/R switch implemented in 90nm CMOS is reported. A body isolation technique is employed and optimized for power handling capability. Inductors are employed with the transistor switches for parallel resonance to improve isolation. Thick oxide NMOS transistors are used for the switching transistors and placed inside the inductors to reduce the active chip area to approximately 0.2mm 2 . 0.9-dB insertion loss for both TX and RX modes is achieved with a 5-V control voltage. Index Terms -RF Switch, T/R Switch, Wireless LAN, Time Division Multiplexing.

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