(Invited) Temperature Influence on Current Leakage and Hysteresis of Nc-CdSe Embedded Zr-Doped HfO₂ High-k Dielectric Nonvolatile Memory

Abstract

Current leakage and hysteresis characteristics of a MOS capacitor containing nanocrystalline CdSe embedded ZrHfO high-k gate dielectric at different temperatures have been investigated. Variation of the temperature changes the supply and energy state of charges from the Si wafer, the charge trapping and retaining properties of the embedded nanocrystal, and the conductivity of the high-k stack. They are responsible for the magnitude and hysteresis of the leakage current. Depending on the polarity and magnitude of the applied voltage and the substrate temperature, charges are transferred following the Schottky emission, Poole-Frenkel, or Fowler-Nordheim mechanism. The leakage current hysteresis of the nanocrystalline CdSe embedded sample is smaller than that of the control sample, and the difference increases as the temperature rises. These phenomena are related to the defect density, the physical thickness, and the charge trapping mechanism.

Temperature Effects on Charge Storage and Transfer of Nanocrystalline CdSe Embedded Zr-Doped HfO2MOS Memory Device

“…15,22 For example, at 20 • C, the oxide trapping density, Q, of the control sample is 7.09 × 10 10 cm −2 and that of the nc-CdSe embedded sample is 1.79 × 10 12 cm −2 . The J-V hysteresis is obvious in the small V g range of −2 V to +2 V. 38 The J-V hysteresis of the control sample is more significant than that of the nc-CdSe embedded sample. When the temperature is increased, the hysteresis window of the control sample becomes larger than that of the nc-CdSe embedded sample.…”

“…Then, the leakage current is changed to the transfer of electrons that are injected from the Si substrate. 38 J remains positive and increases with the increase of V g . After reaching V g = +4 V, the sweeping voltage is changed toward the opposite direction.…”

“…The J-V hysteresis is obvious in the small V g range of −2 V to +2 V. 38 The J-V hysteresis of the control sample is more significant than that of the nc-CdSe embedded sample. When the temperature is increased, the hysteresis window of the control sample becomes larger than that of the nc-CdSe embedded sample.…”

“…At the same time, the loosely trapped holes start to tunnel back to the Si substrate. 3,38 When the number of detrapped holes is larger than that of holes injected from the Si substrate, the polarity of J changes. As V g is close to 0 V, the holerich accumulation layer disappears, and the electron-rich inversion layer is gradually formed.…”

“…For the control sample in the small V g region, charges are loosely trapped and easy to detrap. 3,38 The amount of the loosely trapped charges increases with the increase of temperature. 22 They are easy to detrap with a reduction of the applied voltage.…”