iPROBE: Internal Shielding Approach for Protecting Against Front-Side and Back-Side Probing Attacks

Gao, Minyan; Rahman, M. Sazadur; Varshney, Nitin; Tehranipoor, Mark; Forte, Domenic

doi:10.1109/tcad.2023.3276525

Cited by 13 publications

(2 citation statements)

References 22 publications

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“…Typically, these assets reside in secure tamper-proof memory (TPM) (e.g., non-volatile memory (NVM)) within the SiP and are passed through (unencrypted) the chiplets during data communication at the interposer layer. In this case, adversaries (in-field) can insert semi/non-invasive micro/nano probe needles into the interposer layer [51], [52], thus gaining access to the transmitted data [4], [43]. Consequently, they gain unauthorized access to extract the security assets, as shown in Figure 4.…”

Section: A Case C1: Probing-based Information Leakagementioning

confidence: 99%

Advancing Trustworthiness in System-in-Package: A Novel Root-of-Trust Hardware Security Module for Heterogeneous Integration

Sami,

Zhang,

Shuvo

et al. 2024

IEEE Access

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The semiconductor industry has adopted heterogeneous integration (HI), incorporating modular intellectual property (IP) blocks (chiplets) into a unified system-in-package (SiP) to overcome the slowdown in Moore's Law and Dennard scaling and to respond to the increasing demand for advanced integrated circuits (ICs). Despite the manifold benefits of HI, such as enhanced performance, reduced area overhead, and improved yield, this transformation has also led to security vulnerabilities in the SiP supply chain and in-field operations, ranging from chiplet piracy and SiP reverse engineering (RE) to information leakage. Although conventional countermeasures provide the desired robustness for monolithic ICs, they are insufficient for addressing these challenges in the context of HI. To address these concerns, this paper presents a novel root-of-trust architecture, augmenting the process of integration using a centralized chiplet hardware security module (CHSM), aiming to provide comprehensive and robust protection throughout the SiP supply chain and in-field operations. Also, the proposed architecture equipped with the CHSM effectively addresses potential security breaches while providing robust protection against zero-day attacks through its reconfigurable capabilities. Throughout five detailed case studies, this paper performs a comprehensive security analysis to illustrate the resilience of CHSM against contemporary attack scenarios in the HI domain.

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Section: A Case C1: Probing-based Information Leakagementioning

confidence: 99%

Advancing Trustworthiness in System-in-Package: A Novel Root-of-Trust Hardware Security Module for Heterogeneous Integration

Sami,

Zhang,

Shuvo

et al. 2024

IEEE Access

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“…For example, hardware reverse engineering solutions may be able to extract complete physical layouts from silicon dies. In the realm of invasive attack techniques, focused ion beam (FIB)-based micro-probing attacks [7,8] are gaining increasing attention within both academic and industrial circles. These attacks are noteworthy for their unique capability to intrude upon and manipulate the inner workings of a manufactured electronic circuit with minimal disruption to the overall system.…”

Section: Introductionmentioning

confidence: 99%

Detour-RS: Reroute Attack Vulnerability Assessment with Awareness of the Layout and Resource

Gao,

Biswas,

Asadi

et al. 2024

Cryptography

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Recent decades have witnessed a remarkable pace of innovation and performance improvements in integrated circuits (ICs), which have become indispensable in an array of critical applications ranging from military infrastructure to personal healthcare. Meanwhile, recent developments have brought physical security to the forefront of concern, particularly considering the valuable assets handled and stored within ICs. Among the various invasive attack vectors, micro-probing attacks have risen as a particularly menacing threat. These attacks leverage advanced focused ion beam (FIB) systems to enable post-silicon secret eavesdropping and circuit modifications with minimal traceability. As an evolved variant of micro-probing attacks, reroute attacks possess the ability to actively disable built-in shielding measures, granting access to the security-sensitive signals concealed beneath. To address and counter these emerging challenges, we introduce a layout-level framework known as Detour-RS. This framework is designed to automatically assess potential vulnerabilities, offering a systematic approach to identifying and mitigating exploitable weaknesses. Specifically, we employed a combination of linear and nonlinear programming-based approaches to identify the layout-aware attack costs in reroute attempts given specific target assets. The experimental results indicate that shielded designs outperform non-shielded structures against reroute attacks. Furthermore, among the two-layer shield configurations, the orthogonal layout exhibits better performance compared to the parallel arrangement. Furthermore, we explore both independent and dependent scenarios, where the latter accounts for potential interference among circuit edit locations. Notably, our results demonstrate a substantial near 50% increase in attack cost when employing the more realistic dependent estimation approach. In addition, we also propose time and gas consumption metrics to evaluate the resource consumption of the attackers, which provides a perspective for evaluating reroute attack efforts. We have collected the results for different categories of target assets and also the average resource consumption for each via, required during FIB reroute attack.

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Secure Heterogeneous Integration

Tehranipoor,

Zamiri Azar,

Asadizanjani

et al. 2024

Hardware Security

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iPROBE: Internal Shielding Approach for Protecting Against Front-Side and Back-Side Probing Attacks

Cited by 13 publications

References 22 publications

Advancing Trustworthiness in System-in-Package: A Novel Root-of-Trust Hardware Security Module for Heterogeneous Integration

Advancing Trustworthiness in System-in-Package: A Novel Root-of-Trust Hardware Security Module for Heterogeneous Integration

Detour-RS: Reroute Attack Vulnerability Assessment with Awareness of the Layout and Resource

Secure Heterogeneous Integration

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