Is the current DO-254 verification process adequate for the future?

Butka, Brian

doi:10.1109/dasc.2012.6382383

Cited by 2 publications

(4 citation statements)

References 6 publications

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“…DO-254 [2] and ISO 26262 [1]. In [15], this method was extended with constrained-random simulation for robustness testing, or in IEC 61508 terms "expanded functional testing" [5]. Researchers in [11] mentioned the difficulty of tracking verification progress in FPV.…”

Section: Related Work and Backgroundmentioning

confidence: 99%

“…Weighted constraints can be used to guide the randomization in order to increase chances of generating scenarios of interest while also testing unusual input combinations. This technique typically finds more faults than directed testing [8,15]. SystemVerilog provides many features to ease the development of flexible testbenches as well as properties and sequences which can be used both in simulation and FPV [7].…”

Section: Related Work and Backgroundmentioning

confidence: 99%

“…It is required by the DO-178 standard for software in avionics industry [4]. Simulation tools provide this metric as well for HDL code [15]. SystemVerilog covergroups, cover properties or assertions could also be added by the designers to ensure that simulation test benches cover important implementation details [8,12].…”

Section: Related Work and Backgroundmentioning

confidence: 99%

“…The goal should be 100% functional and structural coverage. If it can not be reached, an analysis should be performed and it should be justified why less than 100% are acceptable [15]. Natural Language Properties (NLPs) [16] are our coverage model items for FPV.…”

Section: Verification Planningmentioning

confidence: 99%

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A Functional Verification Methodology for Highly Parametrizable, Continuously Operating Safety-Critical FPGA Designs: Applied to the CERN RadiatiOn Monitoring Electronics (CROME)

Ceesay-Seitz

Boukabache

Perrin

2020

Lecture Notes in Computer Science

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Electronic systems that are related to human safety need to comply to strict international standards such as the IEC 61508. We present a functional verification methodology for highly parametrizable, continuously operating, safety-critical real-time systems implemented in FPGAs. It is compliant to IEC 61508 and extends it in several ways. We focus on independence between design and verification. Natural language properties and the functional coverage model build the connection between system safety requirements and verification results, providing forward and backward traceability. Our main verification method is Formal Property Verification (FPV), even for Safety Integrity Level 1 and 2. Further, we use constrained-random simulation in SystemVerilog with the Universal Verification Methodology and a design independent C reference model. When faults are discovered, the coverage model is extended to avoid regressions. Automation allows the reproduction of results and the reuse of verification code. We evaluate our methodology on a subset of the newly developed CERN RadiatiOn Monitoring Electronics (CROME). We present the challenges we faced and propose solutions. Although it is impossible to simulate the full design exhaustively, several formal properties have been fully proven. With FPV we found some safety-critical faults that would have been extremely hard to find in simulation.

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Section: Related Work and Backgroundmentioning

confidence: 99%

Section: Related Work and Backgroundmentioning

confidence: 99%