Island-Style Monolithic Three-Dimensional CMOS-Nanoelectromechanical Logic Circuits

Kwon, Hyug Su; Ko, Ji Wang; Choi, Woo Young

doi:10.1109/led.2020.3001362

Cited by 11 publications

(4 citation statements)

References 11 publications

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“…NEM memory switches can be integrated in the metal interconnect layers by using a conventional CMOS backend-of-line process, and they can route the data signal paths over the CMOS logic circuits. The basic concept and feasibility of CMOS-NEM hybrid circuits have so far been confirmed by either simulation [8], [9], [12] or experimental results [10]- [12] in comparison with CMOS-only circuits. NEM memory switches can be placed in any location in CMOS metal layers [13].…”

Section: Introductionmentioning

confidence: 85%

“…However, conventional CAM suffers from a low integration density and high power consumption originating from the complementary metal-oxide-semiconductor-only (CMOSonly) circuits [5]- [7]. Meanwhile, nanoelectromechanical (NEM) memory switches have been proposed as nonvolatile routing elements for replacing CMOS routing circuits [8]- [12]. NEM memory switches can be integrated in the metal interconnect layers by using a conventional CMOS backend-of-line process, and they can route the data signal paths over the CMOS logic circuits.…”

Section: Introductionmentioning

confidence: 99%

“…For comparison, the operation of conventional CMOS-only BCAM is also simulated. The simulation parameters of NEM memory switches and CMOS circuits are calibrated referring to our previous experimental data [12].…”

Section: Introductionmentioning

confidence: 99%

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Nanoelectromechanical-Switch-Based Binary Content-Addressable Memory (NEMBCAM)

Lee

Choi

2021

IEEE Access

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This paper proposes a novel nanoelectromechanical-switch-based binary content-addressable memory (NEMBCAM) for the first time. A nanoelectromechanical (NEM) memory switch serves as both a nonvolatile memory and a switchable current path in an NEMBCAM unit cell. Owing to monolithic threedimensional integration, NEMBCAM achieves a smaller unit cell area in comparison with conventional complementary metal-oxide-semiconductor-only binary content-addressable memory. Small unit cell area results in reduced match line (ML) capacitance, which lowers search energy consumption. Furthermore, a shorter search delay is achieved owing to the near-perfect on/off characteristic of the NEM memory switch.

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Section: Introductionmentioning

confidence: 85%

Section: Introductionmentioning

confidence: 99%

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Nanoelectromechanical-Switch-Based Binary Content-Addressable Memory (NEMBCAM)

Lee

Choi

2021

IEEE Access

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“…While ferroelectric random-access memory (FRAM) can go up to 125 • C [3] and correlated electron random access memory (CeRAM) has been reported to work up to 300 • C [4], uniquely, nanoelectromechanical (NEM) relays are simultaneously high temperature capable [5] and radiation hard [6] with zero standby power. However, to date, while single devices have been demonstrated [7]- [11], any memories or memory cells are one-time programmable [12] or require CMOS for access [13]- [15]. Our own prior work discussed implementation of a fully mechanical relay-based memory cell, but this could not be operated as intended due to the beams of the relays collapsing to the substrate when actuated with the required access pattern [16].…”

Section: Introductionmentioning

confidence: 99%

Digital Nanoelectromechanical Non-Volatile Memory Cell

Kulsreshath,

Tang,

Worsey

et al. 2024

IEEE Electron Device Lett.

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Nanoelectromechanical relays are inherently radiation hard and can operate at high temperatures. Thus, they have potential to serve as the building blocks in nonvolatile memory that can be used in harsh environments with zero standby power. However, a reprogrammable memory cell built entirely from relays that can be operated with a digital protocol has not yet been demonstrated. Here, we demonstrate a fully mechanical digital non-volatile memory cell built from in-plane silicon nanoelectromechanical relays; a 7-terminal bistable relay utilizes surface adhesion forces to store binary data without consuming any energy, while 3-terminal relays are used for read and write access without the need for CMOS. We have optimized the designs to prevent collapse to the substrate under actuation and recorded voltages of 13, 13.2 and 27 V for programming, read and reprogramming operations. This non-volatile memory cell can potentially be used to build embedded memories for edge applications that have stringent temperature, radiation and energy constraints.

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Wafer‐Scale CMOS‐Compatible Electro‐Thermally Actuated Nanomechanical Non‐Volatile Switch with Out‐of‐Plane Electrode Configuration

Lee,

Choi,

Kang

et al. 2024

Adv Elect Materials

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The rapid growth of data‐intensive applications has significantly heightened the concerns about power consumption in current computing systems. From this perspective, there have been substantial efforts to implement ultra‐low power systems by integrating nanoelectromechanical non‐volatile switches (NEM‐NVS) with near‐zero leakage current into standard complementary metal‐oxide‐semiconductor (CMOS) circuits. To practically harness the potential of the NEM‐NVS, it is imperative to achieve high performance, such as low voltage, high on/off ratio, and high reliability, while simultaneously ensuring wafer‐scale CMOS compatibility. However, achieving these requirements is still challenging, primarily due to their electrostatic operation, in‐plane electrode configuration, and conventional fabrication methods. Here, an electro‐thermally actuated nanomechanical non‐volatile switch (ETAN‐NVS) with an out‐of‐plane electrode configuration along with an 8‐inch wafer‐scale CMOS‐compatible fabrication method is reported. By introducing the electrothermal mechanism into a vertically actuated buckling nanostructure, the fabricated ETAN‐NVS attains CMOS‐level voltage (<2.4 V), a high on/off ratio (>108), and exceptional reliability (>1300 cycles). Moreover, a successful wafer‐scale demonstration of the ETAN‐NVS using only a CMOS‐compatible process paves the way for 3D integration with CMOS logic.

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Island-Style Monolithic Three-Dimensional CMOS-Nanoelectromechanical Logic Circuits

Cited by 11 publications

References 11 publications

Nanoelectromechanical-Switch-Based Binary Content-Addressable Memory (NEMBCAM)

Nanoelectromechanical-Switch-Based Binary Content-Addressable Memory (NEMBCAM)

Digital Nanoelectromechanical Non-Volatile Memory Cell

Wafer‐Scale CMOS‐Compatible Electro‐Thermally Actuated Nanomechanical Non‐Volatile Switch with Out‐of‐Plane Electrode Configuration

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