Jitter and decision-level noise separation in A/D converters

Tangelder, R.J.W.T.; Vries, H. de; Rosing, R.; Kerkhoff, Hans G.; Sachdev, Manoj

doi:10.1109/imtc.1999.776087

Cited by 9 publications

(3 citation statements)

References 6 publications

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“…To calculate the sampling error that results from periodic perturbation on the clock signal phase, the instantaneous period jitter "ε j (t)" which results from the presence of a single sinusoidal perturbation on the phase can be obtained from (11) as, f j is the frequency of the sinusoidal perturbation on the phase noise. Then, Equation (18) indicates that the periodic jitter will follow a periodic pattern similar to that measured on the phase noise. The result in (18) also indicates that the sampling error will also be periodic in nature.…”

Section: Sampling Error Due To Periodic Phase Perturbations In the Samentioning

confidence: 95%

“…Various authors have analyzed the impact of timing jitter in the sampling clock on the signal-to-jitter noise (S/N jit ) ratio of the digitized waveform [11][12][13][14][15][16][17][18][19][20][21][22][23]. However, no attempt has been reported to use the phase noise characterization of the phase instability to determine the S/N jit ratio of the digitized waveform.…”

Section: Introductionmentioning

confidence: 99%

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Sampling Error Estimation in High-Speed Sampling Systems Introduced by the Presence of Phase Noise in the Sampling Clock

Marougi

2008

9th International Symposium on Quality Electronic Design (Isqed 2008)

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The presence of phase noise in the sampling clock of fast Analog-to-Digital converters introduces time jitter into the sampling instants of the Analog-toDigital converter. In this paper, an analysis has been performed to quantify the impact of phase perturbation in the sampling clock on the signal-to-noise ratio of the digitized waveform. Close form formulae have been obtained for the signal-to-jitter noise (S/N jit ) ratio when the phase perturbation is random as well as when it is dominated by a periodic and deterministic component. The result obtained is then used to predict the jitter noise generated by a sampling clock with typical phase noise performance. The results obtained will help identify the impact of the various sampling and phase noise parameters on the resulting S/N jit ratio.

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Section: Sampling Error Due To Periodic Phase Perturbations In the Samentioning

confidence: 95%

Section: Introductionmentioning

confidence: 99%

Sampling Error Estimation in High-Speed Sampling Systems Introduced by the Presence of Phase Noise in the Sampling Clock

Marougi

2008

9th International Symposium on Quality Electronic Design (Isqed 2008)

View full text Add to dashboard Cite

show abstract

“…Ввиду того, что в MIMO радаре каждый приемный канал оцифровывается независимо, данные параметры напрямую определяются характеристиками одного приемного канала. В этом случае предполагаемый динамический диапазон приемного тракта равен 75 дБ, тогда как минимальная чувствительность равна минус 98 дБм [15][16][17]. Следовательно, с учетом запаса в 2 значащих бита (12 дБ) аналогово-цифрового преобразователя, конфигурация решетки должна обеспечивать такое запирание, чтобы на каждый приемный модуль суммарная мощность сигнала на входе каждого приемного элемента была не более минус 35 дБм.…”

Section: рис 5 варианты расположения приемных и передающих элементовunclassified