JPEG encoder for low-cost FPGAs

Osman, H.; Mahjoup, W.; Nabih, Azza K.; Aly, Gamal M.

doi:10.1109/icces.2007.4447078

Cited by 12 publications

(4 citation statements)

References 8 publications

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“…JPEG compression is the most commonly seen technology and the most famous distortion compression technology [10]. It can compress the image file to the appropriate size according to the image quality required by itself.…”

Section: B Jpeg Image Formatsmentioning

confidence: 99%

Comparison of the LoRa Image Transmission Efficiency Based on Different Encoding Methods

Wei¹,

Su²,

Chen³

2020

IJIEE

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The booming Internet of Things (IoT) can be seen in all areas of daily life. In the traditional wireless sensing network technology, there are difficult factors such as insufficient transmission distance or high power consumption. The emergence of LoRa (Long Range) technology has broken the difficult factors of traditional wireless sensing network technology. Due to the demand for image in IoT applications, the LoRa technology of low data rate will be designed to transmit the image of high data quantity in this paper. Different encoding methods will influence the transmitted file size and the transmission efficiency. Two major encoding methods are presented to conduct the comparison experiment of image transmission efficiency. PSNR (Peak Signal-to-Noise Ratio), SSIM index (Structural Similarity Index) and transmission time are used to evaluate the image transmission efficiency under different encoding method.

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Section: B Jpeg Image Formatsmentioning

confidence: 99%

Comparison of the LoRa Image Transmission Efficiency Based on Different Encoding Methods

Wei¹,

Su²,

Chen³

2020

IJIEE

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“…An FPGA solution had been studied in [5] for the implementation of JPEG encoder with optimal resources use as a goal. The maximum operating frequency of the JPEG chip is 585 48.5 MHz.…”

Section: The Proposed Architecture For Compression Circuitmentioning

confidence: 99%

Efficient hardware solution for low power and adaptive image-compression in WSN

Kaddachi¹,

Soudani²,

Nouira³

et al. 2010

2010 17th IEEE International Conference on Electronics, Circuits and Systems

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In this paper, we present and evaluate a hardware implementation for user-driven and packet-loss tolerant image compression, especially designed to enable low-power image compression and communication over wireless sensors networks (WSNs). The proposed compression scheme, presented as a CMOS circuit, is intended to be embedded in the camera sensor.It will be considered as a co-processor for tasks related with image compression and data packetization, which unloads the main microcontroller so that it will spend less time in active mode. The interest of our solution is twofold. First, compression settings can be changed at runtime (upon reception of a request message sent by an end-user or according to the internal state of the camera sensor node). Second, the image compression chain includes a (block of) pixel interleaving scheme which significantly improves the robustness against packet loss in image communication. The main part of this paper focuses on the specification and the performances analysis of this solution when implemented on FPGA and ASIC circuits.

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“…The design in [29] describes an MPEG-2 encoder. In [30], another JPEG encoder is implemented for images where the quantization block is designed using multiplication and shift operation instead of division. The design in [31] describes a multi standard video decoder to support four codecs -AVS, H.264, VC-1 and MPEG-2.…”

Section: Previous Workmentioning

confidence: 99%

A Cost-Shared Quantization Algorithm and Its Implementation for Multi-Standard Video Codecs

Das

Wahid

2013

Circuits Syst Signal Process

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The current trend of digital convergence creates the need for the video encoder and decoder system, known as codec in short, that should support multiple video standards on a single platform. In a modern video codec, quantization is a key unit used for video compression. In this thesis, a generalized quantization algorithm and hardware implementation is presented to iii ACKNOWLEDGMENTSThe work presented in this thesis has been carried out at the

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JPEG encoder for low-cost FPGAs

Cited by 12 publications

References 8 publications

Comparison of the LoRa Image Transmission Efficiency Based on Different Encoding Methods

Comparison of the LoRa Image Transmission Efficiency Based on Different Encoding Methods

Efficient hardware solution for low power and adaptive image-compression in WSN

A Cost-Shared Quantization Algorithm and Its Implementation for Multi-Standard Video Codecs

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