Junctionless Nanosheet (3 nm) Poly-Si TFT: Electrical Characteristics and Superior Positive Gate Bias Stress Reliability

Lin, Jer-Yi; Kumar, Malkundi Puttaveerappa Vijay; Chao, Tien−Sheng

doi:10.1109/led.2017.2779451

Cited by 22 publications

(9 citation statements)

References 30 publications

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“…It is apparent that the V TH of the poly-Si IDG-NSH-TFT increases with stress time, and the I ON decreases with stress time. It is due to the strong vertical electric field stress of the PGS, which leads to lattice damage and trap state generation in the poly-Si channel and the SiO 2 /poly-Si interface, as well as electron injection into the TGOX and subsequent trapping by TGOX, [18][19][20] as shown in Fig. 8.…”

Section: Resultsmentioning

confidence: 99%

Exploring Performance and Reliability Behavior of Nanosheet Channel Thin-Film Transistors under Independent Dual Gate Bias Operation

Ma,

Su,

Kao

et al. 2023

ECS J. Solid State Sci. Technol.

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A polycrystalline-silicon (poly-Si) thin-film transistor with an independent dual-gate (IDG) structure and ultra-thin nanosheet channel (~ 4 nm) was fabricated to investigate the impacts of different dual-gate operation modes on device performance and reliability. Compared to the single top-gate (TG) operation mode, the double-gate (DG) operation mode exhibits superior threshold voltage (VTH), subthreshold swing, and saturation current in the device. In addition, the DG operation mode also shows better reliability behavior of positive gate bias stress (PGS) due to the enhanced control capability of the gate voltage on the channel potential. Under the single TG operation mode, the independent back-gate voltage (VBG) can effectively modulate the device's VTH to meet circuit design requirements. Using a fixed positive VBG can not only reduce the VTH of the device, but also decrease the damage caused by the PGS on the device due to the buried channel effect generated by the ultra-thin nanosheet channel, which increases the coupling capacitance thickness between the buried channel and the top-gate oxide layer. On the contrary, using a negative VBG will enhance the PGS degradation of TG. Consequently, the positive VBG is suggested to lower the VTH and improve the PGS of the device.

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Section: Resultsmentioning

confidence: 99%

Exploring Performance and Reliability Behavior of Nanosheet Channel Thin-Film Transistors under Independent Dual Gate Bias Operation

Ma,

Su,

Kao

et al. 2023

ECS J. Solid State Sci. Technol.

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“…Polycrystalline silicon (poly-Si) can be produced at lower cost than single crystal silicon (c-Si) and has a high carrier mobility compared to amorphous silicon (a-Si). Therefore, it is a promising candidate for channel materials such as thin films transistors [1][2][3][4][5][6] and 3D NAND flash memory. 7,8) Moreover, poly-Si is also expected for next-generation thermoelectric device materials.…”

Section: Introductionmentioning

confidence: 99%

Thermal conductivity characteristics in polycrystalline silicon with different average sizes of grain and nanostructures in the grains by UV Raman spectroscopy

Takeuchi¹,

Yokogawa²,

Takahashi³

et al. 2020

Jpn. J. Appl. Phys.

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We directly evaluated thermal conductivity characteristics for the polycrystalline silicon (poly-Si) thin films, in order to clarify the influence of nanostructures in the individual grain. Laser-power dependent Raman spectroscopy showed the temperature increase caused by laser heating. The temperature increase of each sample is different depending on the poly-Si fabrication process. It is considered that this temperature increase is caused by the increase in the phonon scattering inside the grain due to the reduction of the nanostructure sizes in addition to the phonon scattering at the grain boundaries. These results indicate that not only the average grain size but also the nanostructures inside grains should be carefully considered to control thermal conductivities for next-generation poly-Si thin film devices such as thermoelectric device.

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“…The microelectronic industry has benefited enormously from the metal-oxide-semiconductor field effect transistor (MOSFET) miniaturization; the channel length of aggressively scaled down MOSFET already reaches the nanoscale. 1) The new three-dimensional transistors such as FinFET, 2) nanowire, 3,4) and nanosheet transistors [5][6][7] have been developed and studied. In the nanoscale regime, quasi-ballistic electron transport is expected to occur and has been studied for a few decades.…”

Section: Introductionmentioning

confidence: 99%

Nonequilibrium Green function simulation of coupled electron–phonon transport in one-dimensional nanostructures

Kajiwara

Mori

2019

Jpn. J. Appl. Phys.

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Phonon thermal-conductance of a one-dimensional semiconductor nanostructure has been calculated by self-consistently solving coupled nonequilibrium Green function equations for electrons and phonons. The channel length, N, dependence of the phonon thermal-conductance change, ΔK p , due to the electron-phonon interaction is found to obey a simple relation ofp e with a constant proportionality factor β for the calculated N range up to N = 100 (G e is the electrical conductance). The phonon thermal-conductance change in the isotopically disordered system is found to be hardly affected by the presence of the isotope impurities. © 2019 The Japan Society of Applied Physics where u i is the mass-renormalized atom displacement.The electron-phonon interaction is taken into account only in the channel region within the Su-Schrieffer-Heeger (SSH) model, 36) where the electron transfer is affected by the lattice distortion. The electron-phonon interaction Hamiltonian 31) is thus given by

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Junctionless Nanosheet (3 nm) Poly-Si TFT: Electrical Characteristics and Superior Positive Gate Bias Stress Reliability

Cited by 22 publications

References 30 publications

Exploring Performance and Reliability Behavior of Nanosheet Channel Thin-Film Transistors under Independent Dual Gate Bias Operation

Exploring Performance and Reliability Behavior of Nanosheet Channel Thin-Film Transistors under Independent Dual Gate Bias Operation

Thermal conductivity characteristics in polycrystalline silicon with different average sizes of grain and nanostructures in the grains by UV Raman spectroscopy

Nonequilibrium Green function simulation of coupled electron–phonon transport in one-dimensional nanostructures

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