Kerncraft: A Tool for Analytic Performance Modeling of Loop Kernels

Abstract

Achieving optimal program performance requires deep insight into the interaction between hardware and software. For software developers without an indepth background in computer architecture, understanding and fully utilizing modern architectures is close to impossible. Analytic loop performance modeling is a useful way to understand the relevant bottlenecks of code execution based on simple machine models. The Roofline Model and the Execution-Cache-Memory (ECM) model are proven approaches to performance modeling of loop nests. In comparison to the Roofline model, the ECM model can also describes the single-core performance and saturation behavior on a multicore chip. We give an introduction to the Roofline and ECM models, and to stencil performance modeling using layer conditions (LC). We then present Kerncraft, a tool that can automatically construct Roofline and ECM models for loop nests by performing the required code, data transfer, and LC analysis. The layer condition analysis allows to predict optimal spatial blocking factors for loop nests. Together with the models it enables an ab-initio estimate of the potential benefits of loop blocking optimizations and of useful block sizes. In cases where LC analysis is not easily possible, Kerncraft supports a cache simulator as a fallback option. Using a 25-point long-range stencil we demonstrate the usefulness and predictive power of the Kerncraft tool.

Automated Instruction Stream Throughput Prediction for Intel and AMD Microarchitectures

“…If a dataset fits in the first-level cache, all accesses will behave the same and there is no need to consider the order and pattern of previous accesses or (possibly undisclosed) cache replacement algorithms. Behavior beyond L1 can be modeled separately, but this is beyond the scope of this work (the Kerncraft tool [4], which relies on an in-core analysis from IACA and -in the future -OSACA, combines it with data analysis for a unified Roofline or ECM prediction). 2) Multiple available ports per instruction are utilized with fixed probabilities.…”

“…Once known, the bottleneck can often be mitigated by changes in the code, the runtime parameters, or the execution environment. When the models' construction is automated [3], [4], compilers and a wider user base can take advantage of them.…”

Dynamic Load Balancing Techniques for Particulate Flow Simulations

“…By including information available from performance models for the different algorithms, the workload estimator can be made more general and flexible. Tools like Kerncraft [41] automatically analyze the performance of a given implementation for the hardware at hand, which would render the estimator independent of these factors. Furthermore, a workload estimate based on the current runtimes is a natural alternative to the proposed predictor as it is able to use actual data from the currently running simulation.…”

Automatic Throughput and Critical Path Analysis of x86 and ARM Assembly Kernels

“…However, they require a deep understanding of the underlying micro-architecture in order to yield accurate results. Common (simplified) approaches for numerical kernels are the Roofline [1] model or the ECM [2] model, whose construction is supported by the Kerncraft open-source performance modeling tool [3]. For Roofline, the Roofline Model Toolkit [4] and Intel's Roofline Advisor 1 are also available.…”

“…With OSACA's semi-automatic benchmarking pipeline, compilers can benefit from an automated model construction [3], [4]. The instruction database is dynamically extendable, which enables users to adapt the tool to other application scenarios beyond numerical kernels found in HPC usecases.…”