Key material parameters driving CBRAM device performances

Goux, L.; Radhakrishnan, J.; Belmonte, Attilio; Witters, T.; Devulder, Wouter; Redolfi, A.; Kundu, Shreya; Houssa, Michel; Kar, Gouri Sankar

doi:10.1039/c8fd00115d

Cited by 15 publications

(9 citation statements)

References 14 publications

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“…We note that similar considerations relating to material stability under repeated operation have also been the a b c e d subject of significant work in developing this class of materials for non-volatile memory applications with high cycling endurance. For instance, studies have shown that endurance can be improved via using alloy electrodes like Ag-Te [38], Ag-Cu [39], inserting Ag diffusion barrier layer [40], area scaling of the device switching region [41], using host materials with stronger chemical bonding among its components [42], nitridation [43]. We anticipate that resistance to such microstructural degradation for the case of the ARS may similarly be achieved by designing optimized electrode, switching structures, adjusting resistor area, new host matrix and electrode materials, and the introduction of solute additives that can retard diffusive processes that exacerbate microstructural fatigue.…”

Section: Discussionmentioning

confidence: 99%

Quenching of single photon avalanche photodiodes with dynamic resistive switches

Zheng

Xue

Yuan

et al. 2021

Advanced Photon Counting Techniques XV

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Single-photon avalanche diodes (SPAD) are often quenched by using a passive resistor in series. This limits the recovery speed of the SPAD. High resistance needed to quench the avalanche leads to slower recharging of the SPAD. We resolve this by replacing the fixed quenching resistor with a bias-dependent adaptive oxide resistive switch that assumes low and high resistance states under unipolar bias. Using a Pt/Al2O3/Ag resistor with a commercial SPAD, we demonstrate avalanche pulse widths of ~37 ns, 8× smaller than a passively quenched approach. The results are consistent with a model where the adaptive resistor changes resistance during SPAD discharging and recharging.

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Section: Discussionmentioning

confidence: 99%

Quenching of single photon avalanche photodiodes with dynamic resistive switches

Zheng

Xue

Yuan

et al. 2021

Advanced Photon Counting Techniques XV

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“…In CBRAMs [44,45,46], a conductive filament (CF) is created (and dissolved) in a solid electrolyte by means of redox reactions. By applying a positive voltage to the “active” electrode (the anode), it releases metallic cations into the electrolyte that migrate towards the “inert” electrode (the cathode) pushed by the electric field.…”

Section: Methodsmentioning

confidence: 99%

Multiscale Modeling for Application-Oriented Optimization of Resistive Random-Access Memory

Torraca

Puglisi

Padovani³

et al. 2019

Materials

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Memristor-based neuromorphic systems have been proposed as a promising alternative to von Neumann computing architectures, which are currently challenged by the ever-increasing computational power required by modern artificial intelligence (AI) algorithms. The design and optimization of memristive devices for specific AI applications is thus of paramount importance, but still extremely complex, as many different physical mechanisms and their interactions have to be accounted for, which are, in many cases, not fully understood. The high complexity of the physical mechanisms involved and their partial comprehension are currently hampering the development of memristive devices and preventing their optimization. In this work, we tackle the application-oriented optimization of Resistive Random-Access Memory (RRAM) devices using a multiscale modeling platform. The considered platform includes all the involved physical mechanisms (i.e., charge transport and trapping, and ion generation, diffusion, and recombination) and accounts for the 3D electric and temperature field in the device. Thanks to its multiscale nature, the modeling platform allows RRAM devices to be simulated and the microscopic physical mechanisms involved to be investigated, the device performance to be connected to the material’s microscopic properties and geometries, the device electrical characteristics to be predicted, the effect of the forming conditions (i.e., temperature, compliance current, and voltage stress) on the device’s performance and variability to be evaluated, the analog resistance switching to be optimized, and the device’s reliability and failure causes to be investigated. The discussion of the presented simulation results provides useful insights for supporting the application-oriented optimization of RRAM technology according to specific AI applications, for the implementation of either non-volatile memories, deep neural networks, or spiking neural networks.

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“…The ultralow HRS current stems from the device design, which keeps the area of the active surface minimal. The switching voltage to a low-resistance state (LRS) of the TS device is V th ≈ 0.4 V. Note, V th can be tuned through the fabrication method from ∼0.15 to 1 V [14], [15], which allows for flexible matching to the range of valid threshold voltages (V th ) of each circuit, which in turn depends on the V DD . At the switching point, the current abruptly increases by a factor of 10 8 .…”

Section: Low-leakage Threshold Switchmentioning

confidence: 99%

Threshold Switching Enabled Sub-pW-Leakage, Hysteresis-Free Circuits

Cheng

Emboras

Passerini

et al. 2021

IEEE Trans. Electron Devices

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In this article, we present ultralow leakage logic circuits by combining 3-D memristors with CMOS transistors. Significant leakage current reductions of up to 99% are found by experiments and simulation for a memristive hybrid-inverter if compared with a conventional inverter. Likewise, circuit simulations of memristive hybrid ring oscillators, NAND, or full adders show more than 100% gain in energy efficiency per cycle over state-ofthe-art circuits. Importantly, the memristive circuits offer hysteresis-free operation. The hysteresis-free operation is due to properly engineered properties-such as the threshold voltage-of the memristors to match the circuit, as well as the self-adaptive filament diameter of our memristor during operation. Lastly, the memristors feature a 10 8 ON-OFF ratio, enabling both high speed and low leakage (∼10 fA) when integrated with a transistor. They also come with a well-controlled filament formation on a ∼10-nm footprint, making them ideal to integrate with modern CMOS technology transistors.

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Key material parameters driving CBRAM device performances

Abstract: This study is focused on Conductive Bridging Random Access Memory (CBRAM) devices based on chalcogenide electrolyte and Cu-supply materials, and aims at identifying the key material parameters controlling memory properties.

Cited by 15 publications

References 14 publications

Quenching of single photon avalanche photodiodes with dynamic resistive switches

Quenching of single photon avalanche photodiodes with dynamic resistive switches

Multiscale Modeling for Application-Oriented Optimization of Resistive Random-Access Memory

Threshold Switching Enabled Sub-pW-Leakage, Hysteresis-Free Circuits

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