La2O3/Si0.3Ge0.7 p-MOSFETs with high hole mobility and good device characteristics

Huang, Chang Hung; Chen, S.B.; Chin, Albert

doi:10.1109/led.2002.805749

Cited by 11 publications

(7 citation statements)

References 10 publications

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“…The detailed physical analysis in oxide semiconductor transistor is not reported yet. However, such hole mobility dependence is generally observed in SiO 2 /Si [50], high-κ/Si [51][52][53], SiO 2 /SiGe [54], high-κ/SiGe [55] and high-κ/Ge [56] p-MOSFETs. Because the Si, SiGe, Ge and SnO are all semiconductors and have the similar valance band structure, the decreased mobility at high electric field may be due to the similar mechanisms of phonon and interface roughness scatterings [57].…”

Section: Resultsmentioning

confidence: 96%

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Exceedingly High Performance Top-Gate P-Type SnO Thin Film Transistor with a Nanometer Scale Channel Layer

2021

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Implementing high-performance n- and p-type thin-film transistors (TFTs) for monolithic three-dimensional (3D) integrated circuit (IC) and low-DC-power display is crucial. To achieve these goals, a top-gate transistor is preferred to a conventional bottom-gate structure. However, achieving high-performance top-gate p-TFT with good hole field-effect mobility (μFE) and large on-current/off-current (ION/IOFF) is challenging. In this report, coplanar top-gate nanosheet SnO p-TFT with high μFE of 4.4 cm2/Vs, large ION/IOFF of 1.2 × 105, and sharp transistor’s turn-on subthreshold slopes (SS) of 526 mV/decade were achieved simultaneously. Secondary ion mass spectrometry analysis revealed that the excellent device integrity was strongly related to process temperature, because the HfO2/SnO interface and related μFE were degraded by Sn and Hf inter-diffusion at an elevated temperature due to weak Sn–O bond enthalpy. Oxygen content during process is also crucial because the hole-conductive p-type SnO channel is oxidized into oxygen-rich n-type SnO2 to demote the device performance. The hole μFE, ION/IOFF, and SS values obtained in this study are the best-reported data to date for top-gate p-TFT device, thus facilitating the development of monolithic 3D ICs on the backend dielectric of IC chips.

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Section: Resultsmentioning

confidence: 96%

“…The La 2 O 3 can achieve the excellent performance of low leakage current and highκ value [55,58,59], but the moisture degradation is stronger than the HfO 2 and ZrO 2 . The ZrO 2 [60] has a higher κ value than HfO 2 once crystallized, which is widely used for dynamic random-access memory (DRAM) capacitor.…”

Section: Resultsmentioning

confidence: 99%

Exceedingly High Performance Top-Gate P-Type SnO Thin Film Transistor with a Nanometer Scale Channel Layer

2021

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“…Recently, the high performance metal-oxide-semiconductor field effect transistors (MOSFETs) with using high-j materials such as La 2 O 3 [2], Al 2 O 3 [3], [19], HfO 2 [5] and mixed metal oxides have been proposed to replace the conventional SiO 2 MOSFETs for equivalent-oxide thickness (EOT) scaling. However, the scalable performance enhancement depends on channel length scaling, gate dielectric scaling and optimized strain engineering like SiGe source-drain and compressive contact etch stop layer (CESL).…”

Section: Introductionmentioning

confidence: 99%

“…The La 2 O 3 dielectric [2,23,24] with high-j value and negative flat band voltage (V fb ) are important for n-MOSFET. The metal-gate/device show high-field mobility of 258 cm 2 /V s at 0.75 MV/cm with a small 1.9-nm EOT.…”

Section: Introductionmentioning

confidence: 99%

High-field mobility metal-gate/high-κ Ge n-MOSFETs with small equivalent-oxide-thickness

Chen

Cheng

Lin

et al. 2011

Solid-State Electronics

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“…The SiGe or strained Si on strain-relaxed SiGe has a high potential to be integrated into metal oxide semiconductor field effect transistors ͑MOSFETs͒, [1][2][3][4][5][6] along with high-gate dielectrics, [7][8][9][10][11][12] resulting in improved mobility. The higher current drive capability of an SiGe or strained Si MOSFET, compared with its Si counterpart, can effectively improve the operation speed and circuit density, and this is equivalent to scaling the device down.…”

mentioning

confidence: 99%

Device Level Characterization for Energy Bandgap of Strain-relaxed SiGe and Oxide/SiGe Barrier Height

Huang

Chin³

et al. 2004

J. Electrochem. Soc.

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From the interface state density with energy plot measured by capacitance-voltage characteristics, we have derived the energy bandgap of strain-relaxed Si 1Ϫx Ge x ͑x: 0.4 and 0.7͒ for the first time at the device level, because the allowed states increases sharply near the conduction and valence bandedges. We find that the energy bandgap of SiGe is reduced from 0.90 to 0.83 eV as the Ge composition increases from Si 0.6 Ge 0.4 to Si 0.3 Ge 0.7 . In contrast, similar oxide/Si 1Ϫx Ge x conduction-band barrier heights of ϳ3.1 eV have been obtained for both SiGe cases using Fowler-Nordheim tunneling. These results are in good agreement with published theoretical and experimental data from material level characterization. The device level characterization is especially important because the SiGe composition and material property may be altered after thermal cycles for device fabrication.

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La₂O₃/Si_0.3Ge_0.7 p-MOSFETs with high hole mobility and good device characteristics

Cited by 11 publications

References 10 publications

Exceedingly High Performance Top-Gate P-Type SnO Thin Film Transistor with a Nanometer Scale Channel Layer

Exceedingly High Performance Top-Gate P-Type SnO Thin Film Transistor with a Nanometer Scale Channel Layer

High-field mobility metal-gate/high-κ Ge n-MOSFETs with small equivalent-oxide-thickness

Device Level Characterization for Energy Bandgap of Strain-relaxed SiGe and Oxide/SiGe Barrier Height

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