Large-scale field-programmable analog arrays for analog signal processing

Hall, Tyson S.; Twigg, C.M.; Gray, J.; Hasler, P.; Anderson, David V.

doi:10.1109/tcsi.2005.853401

Cited by 112 publications

(59 citation statements)

References 26 publications

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“…The rise of FPAA approaches has become the testbed to begin to build this framework. Comparing the CABs of early papers [44] to the CAB topology of recent FPAA designs (e.g., Figure 2 in [1]) shows some similar characteristics, validated by numerous circuits designed and measured in these architectures. Over a decade of consistent FPAA development and application design has roughly converged on a typical mixture of several medium level components per CAB (Transconductance Amplifiers (OTAs), FG OTAs, T-gates), along with a few low level elements (transistors, FG transistors, capacitors).…”

Section: Digital Computationmentioning

confidence: 57%

Starting Framework for Analog Numerical Analysis for Energy-Efficient Computing

Hasler

2017

JLPEA

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Abstract:The focus of this work is to develop a starting framework for analog numerical analysis and related algorithm questions. Digital computation is enabled by a framework developed over the last 80 years. Having an analog framework enables wider capability while giving the designer tools to make reasonable choices. Analog numerical analysis concerns computation on physical structures utilizing the real-valued representations of that physical system. This work starts the conversation of analog numerical analysis, including exploring the relevancy and need for this framework. A complexity framework based on computational strengths and weaknesses builds from addressing analog and digital numerical precision, as well as addresses analog and digital error propagation due to computation. The complimentary analog and digital computational techniques enable wider computational capabilities.

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Section: Digital Computationmentioning

confidence: 57%

Starting Framework for Analog Numerical Analysis for Energy-Efficient Computing

Hasler

2017

JLPEA

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“…Encoding, translating, and decoding an address happens fast enough to route several million spikes per second, allowing 1 million connections to be made among 1000 silicon neurons. In contrast, FPGAs use tracts of metal wires to connect their logic gates together through programmable switches, severely limiting the number of connections each gate can have (typically four); their analog counterparts (fieldprogrammable analog arrays) face similar wiring constraints (Hall et al, 2005).…”

Section: Breakthroughs In Neuromorphic Engineeringmentioning

confidence: 99%

Neurotech for Neuroscience: Unifying Concepts, Organizing Principles, and Emerging Tools

Silver¹,

Boahen²,

Grillner³

et al. 2007

J. Neurosci.

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The ability to tackle analysis of the brain at multiple levels simultaneously is emerging from rapid methodological developments. The classical research strategies of "measure," "model," and "make" are being applied to the exploration of nervous system function. These include novel conceptual and theoretical approaches, creative use of mathematical modeling, and attempts to build brain-like devices and systems, as well as other developments including instrumentation and statistical modeling (not covered here). Increasingly, these efforts require teams of scientists from a variety of traditional scientific disciplines to work together. The potential of such efforts for understanding directed motor movement, emergence of cognitive function from neuronal activity, and development of neuromimetic computers are described by a team that includes individuals experienced in behavior and neuroscience, mathematics, and engineering. Funding agencies, including the National Science Foundation, explore the potential of these changing frontiers of research for developing research policies and long-term planning.

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“…Mobile terminals that operate on batteries, such as cellular phones, laptops, and tablets, the functionality of the devices depend on the kind of signal processing algorithm that gives more reliable performance with better power efficiency [1]. For mobile devices with limited battery power, replacing digital circuits with low-power analog circuits can improve the power efficiency of the devices significantly [6] [7]. Digital designs of Viterbi decoder have reached speed bottlenecks, as they are iterative; complexities in Add-Compare-Select (ACS) operation [4] have further restricted the improvement in operating frequency.…”

Section: Introductionmentioning

confidence: 99%

Hybrid Architecture for OFDM with Optimized Design of Analog Viterbi Decoder

Cyril¹,

Varugheese²

2012

IJCA

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Analog Viterbi Decoder (AVD) is used for decoding of message from the received signal. Very recently mixed signal architecture for OFDM was proposed, that uses FFT processing in the analog domain. In this work, we propose a modified analog Viterbi decoder that performs decoding in analog domain. The proposed analog Viterbi decoder can be used in the mixed signal architecture of OFDM model and hence the proposed architecture is called as Hybrid OFDM architecture. Software reference model of the proposed AVD is developed using Simulink and is verified for its functionality. The Branch Metric Unit (BMU) and the adder unit that forms the subsystems of AVD are optimized for area, power and speed by designing the adders with 24 transistors. The schematic and layout is designed using Virtuoso targeting 130nm technology, the captured design is verified for its functionality using known test vector. A digital Viterbi decoder is also designed with same specifications as that of AVD, and is synthesized using Design Compiler for comparison. From the results obtained it is found that the AVD is 100 time faster, occupies 8 time less are and consumes power less than 86 micro W compared with digital decoder. The proposed AVD is suitable for low power and high speed applications and can be used in Hybrid OFDM architecture.

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Large-scale field-programmable analog arrays for analog signal processing

Cited by 112 publications

References 26 publications

Starting Framework for Analog Numerical Analysis for Energy-Efficient Computing

Starting Framework for Analog Numerical Analysis for Energy-Efficient Computing

Neurotech for Neuroscience: Unifying Concepts, Organizing Principles, and Emerging Tools

Hybrid Architecture for OFDM with Optimized Design of Analog Viterbi Decoder

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