Laser-Induced Fault Injection on Smartphone Bypassing the Secure Boot

Vasselle, Aurélien; Thiebeauld, Hugues; Maouhoub, Quentin; Morisset, Adèle; Ermeneux, S.

doi:10.1109/fdtc.2017.18

Cited by 33 publications

(36 citation statements)

References 10 publications

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“…The injection of faults on more complex SoC has recently raised the interest of security researchers. Attacks targeting an ARM Cortex-A9 platform-typical of early smartphonesattempted priviledge escalation in Linux using power glitches [23] and to bypass secure boot protections using laser injection [25]. Majeric et al [15] sucessfully injected EM-induced faults targeting a hardware AES implementation on a similar SoC.…”

Section: Related Workmentioning

confidence: 99%

See 1 more Smart Citation

A First ISA-Level Characterization of EM Pulse Effects on Superscalar Microarchitectures

Proy¹,

Heydemann

Berzati³

et al. 2019

Proceedings of the 14th International Conference on Availability, Reliability and Security

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In the area of physical attacks, system-on-chip (SoC) designs have not received the same level of attention as simpler micro-controllers. We try to model the behavior of secure software running on a superscalar out-of-order microprocessor typical of more complex SoC, in the presence of electromagnetic (EM) pulses. We first show that it is possible, in a black box approach, to corrupt the loop iteration count of both original and hardened versions of two sensitive loops. We propose a characterization methodology based on very simple codes, to understand and classify the fault effects at the level of the instruction set architecture (ISA). The resulting classification includes the well established instruction skip and register corruption models, as well as new effects specific to more complex processors, such as operand substitution, multiple correlated register corruptions, advanced control-flow hijacking, and combinations of all reported effects. This diversity and complexity of effects can lead to powerful attacks. The proposed methodology and fault classification at ISA level is a first step towards a more complete characterization. It is also a tool supporting the designers of software and hardware countermeasures. CCS CONCEPTS • Security and privacy → Hardware attacks and countermeasures; Software and application security; • Computer systems organization → Embedded and cyber-physical systems.

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Section: Related Workmentioning

confidence: 99%

“…Until recently, microprocessor architecture and SoC complexity were considered strong deterrents for thwarting fault attacks [26]. However, recent papers showed that fault attacks are also effective on such devices [15,23,25], prompting the attention of security researchers to complex microarchitectures.…”

Section: Introductionmentioning

confidence: 99%

A First ISA-Level Characterization of EM Pulse Effects on Superscalar Microarchitectures

Proy¹,

Heydemann

Berzati³

et al. 2019

Proceedings of the 14th International Conference on Availability, Reliability and Security

View full text Add to dashboard Cite

show abstract

“…Among these techniques, fault injection consists in disturbing the operating conditions of a device, while a secure computation takes place, in order to retrieve secret information or be granted unauthorised privileges. Laser fault injection features a high spatial accuracy, which Part of this work is funded by French ANR program (DS0901/2015) with the project PROSECCO (ANR-15-CE39-0008) enables an attacker to induce single bit-flips in static memory cells of 8-bit [1] and 32-bit microcontrollers [2]. An explanation of the fault mechanism at the architectural level was proposed, based on the physical understanding of laser injection phenomenon [3], [4].…”

Section: Introductionmentioning

confidence: 99%

“…Conversely, this technique is expensive and difficult to carry out with numerous precise parameters to tune, which might result in endless explorations of the parameters space. While increasing chip integration enables designers to integrate complex 32-bit architectures, only few work investigate laser injection on these System-on-Chip architectures [2], [5]- [7]. Besides, none of them address the underlying fault mechanism, which makes it difficult to explain the observed fault models in a consistent framework.…”

Section: Introductionmentioning

confidence: 99%

Laser-induced Single-bit Faults in Flash Memory: Instructions Corruption on a 32-bit Microcontroller

Colombier

Dutertre

et al. 2019

2019 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)

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Physical attacks are a known threat posed against secure embedded systems. Notable among these is laser fault injection, which is often considered as the most effective fault injection technique. Indeed, laser fault injection provides a high spatial accuracy, which enables an attacker to induce bit-level faults. However, experience gained from attacking 8-bit targets might not be relevant on more advanced micro-architectures, and these attacks become increasingly challenging on 32-bit microcontrollers. In this article, we show that the flash memory area of a 32-bit microcontroller is sensitive to laser fault injection. These faults occur during the instruction fetch process, hence the stored value remains unaltered. After a thorough characterisation of the induced faults and the associated fault model, we provide detailed examples of bitlevel corruption of instructions and demonstrate practical applications in compromising the security of real-life codes. Based on these experimental results, we formulate a hypothesis about the underlying micro-architectural features that explain the observed fault model.

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“…They were able to inject two single instruction skips distant from 58 ms to defeat a protected CRT-RSA algorithm. In terms of target complexity, [19] reports injection of single instruction skips into a quad core ARM cortex A9 microprocessor running at 1.4 GHz clock frequency. Hence, the state-of-the-art in laser-induced instruction skip was limited to single instruction skips (with a repetition rate in the range of tens of ms).…”

Section: The Instruction Skip Fault Model State-of-the-artmentioning

confidence: 99%

Experimental Analysis of the Laser-Induced Instruction Skip Fault Model

Dutertre

Riom

Potin

et al. 2019

Lecture Notes in Computer Science

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Microcontrollers storing valuable data or using security functions are vulnerable to fault injection attacks. Among the various types of faults, instruction skips induced at runtime proved to be effective against identification routines or encryption algorithms. Several research works assessed a fault model that consists in a single instruction skip, i.e. the ability to prevent one chosen instruction in a program from being executed. This assessment is used to design countermeasures able to withstand a single instruction skip. We question this fault model on experimental basis and report the possibility to induce with a laser an arbitrary number of instruction skips. This ability to erase entire sections of a firmware has strong implications regarding the design of countermeasures.

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Laser-Induced Fault Injection on Smartphone Bypassing the Secure Boot

Cited by 33 publications

References 10 publications

A First ISA-Level Characterization of EM Pulse Effects on Superscalar Microarchitectures

A First ISA-Level Characterization of EM Pulse Effects on Superscalar Microarchitectures

Laser-induced Single-bit Faults in Flash Memory: Instructions Corruption on a 32-bit Microcontroller

Experimental Analysis of the Laser-Induced Instruction Skip Fault Model

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