Lateral Migration of Trapped Holes in a Nitride Storage Flash Memory Cell and Its Qualification Methodology

Zous, N.K.; Lee, M.Y.; Tsai, Wen-Jer; Kuo, Albert; Huang, L.; Lu, Tsung-Chien; Liu, C.J.; Wang, Tahui; Lü, Wei; Ting, W.; Ku, J.; Lu, Chih‐Yuan

doi:10.1109/led.2004.833824

Cited by 19 publications

(2 citation statements)

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“…Charge pumping is a widely used technique that applies varying pulses to the gate to measure the DC body current for the purpose of extracting interface trap density. [ 36 ] With slight modifications of fixing the low level and rise/fall speed of the gate pulses, analyzing the lateral difference in V th along the channel length direction, or in other words, the extent of lateral migration to the Si 3 N 4 layer above the SiO 2 layer of the Side Path device, is possible. [ 37 ] The charge pumping measurement technique incorporates the notions of local V th and local flat band voltage ( V fb ), as shown in Figures 3a‐1 and 3a‐2.…”

Section: Resultsmentioning

confidence: 99%

Lateral Migration‐based Flash‐like Synaptic Device for Hybrid Off‐chip/On‐chip Training

Park,

Hwang,

Lee

et al. 2024

Adv Elect Materials

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An increase in the demand for artificial intelligence is leading to advanced research in the field of neuromorphic systems, which imitate human brain functions with the hope of increasing computational speed and lowering power consumption. Especially, the development of energy‐efficient and reliable synaptic devices is critical as synapses are fundamental building blocks of neuromorphic systems. In this study, by adjusting the charge injection pathway of conventional flash memory devices, a lateral migration‐based synaptic device is proposed. Using the efficient program/erase method, the proposed device is operable at a significantly low voltage while maintaining formidable retention and endurance characteristics. Furthermore, an efficient hybrid off‐chip/on‐chip training method using the proposed device is presented. The results demonstrate a variation‐robust neuromorphic system, indicating the superiority of the proposed device.

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Section: Resultsmentioning

confidence: 99%

Lateral Migration‐based Flash‐like Synaptic Device for Hybrid Off‐chip/On‐chip Training

Park,

Hwang,

Lee

et al. 2024

Adv Elect Materials

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“…In the case of one-transistor (1T) SONOS eNVM cells shown in Fig. 1(a), the EH distribution mismatch has already been discussed elsewhere [2][3][4]. On the other hand, to the best of our knowledge, no EH distribution mismatch has been discussed so far in the case of 2T SONOS eNVM cells as shown in Fig.…”

Section: Introductionmentioning

confidence: 86%

Influence of Electron and Hole Distribution on 2T SONOS Embedded NVM

Choi¹,

Kim²,

Lee³

et al. 2016

JSTS:Journal of Semiconductor Technology and Science

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Abstract-The influence of electron and hole (EH) distribution on two-transistor (2T) silicon-oxidenitride-oxide-silicon (SONOS) embedded nonvolatile memory (eNVM) is investigated in terms of reliability. As PE (program/erase) cycles are repeated, it is observed that the electron distribution in the nitride layer becomes wider. It leads to the EH distribution mismatch, which degrades the reliability of 2T SONOS eNVM.

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Flash‐Type Memories

Mikolajick¹

2010

Nanotechnology

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The trend toward more mobile applications drives a rapidly increasing demand for non‐volatile memories. Today, Flash‐type non‐volatile memories offer by far the best trade‐off between cost and performance. In this chapter, Flash concepts relevant to today and the future are reviewed. Following a brief introduction to the market and the history of Flash memories, the basics required to understand the concepts of Flash memory concepts are explained. These mechanisms are involved in charging and discharging the charge storage layer, as well as the architecture used to combine many cells into large memory arrays. The third section details today's mainstream Flash concepts, which are based on the floating‐gate cell, outlines the physics of the floating‐gate transistor, and introduces the concepts of NOR and NAND Flash. Finally, the main reliability‐determining effects are reviewed, and the further scaling path of floating‐gate memories is illustrated. One way of overcoming the limitations of floating‐gate memories is to replace the conductive floating gate with an insulating charge‐trapping layer; hence, the conventional silicon‐oxide‐nitride‐oxide‐silicon (SONOS) cell and its trade‐offs are explained. Multi‐bit charge trapping, a concept recently introduced for both code and data Flash applications is described in detail, and the scaling of charge‐trapping Flash devices is discussed. Finally, a brief introduction is provided to nanocrystal Flash memory devices, which represent another way of overcoming some basic limitations of the floating gate.

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Lateral Migration of Trapped Holes in a Nitride Storage Flash Memory Cell and Its Qualification Methodology

Cited by 19 publications

References 11 publications

Lateral Migration‐based Flash‐like Synaptic Device for Hybrid Off‐chip/On‐chip Training

Lateral Migration‐based Flash‐like Synaptic Device for Hybrid Off‐chip/On‐chip Training

Influence of Electron and Hole Distribution on 2T SONOS Embedded NVM

Flash‐Type Memories

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