LeadFrameOnChip offers integrated power bus and bond over active circuit

Efland, T.; Abbott, D.C.; Arellano, V.; Buschbom, M.L.; Chang, Wu-Chung; Hoffart, C.; Hutter, Lou N.; Mai, Quang; Nishimura, Iori; Pendharkar, S.; Pierce, Michael S.; Shen, CM; Thee, C.M.; Vanhorn, H.; Williams, Christopher

doi:10.1109/ispsd.2001.934560

Cited by 4 publications

(1 citation statement)

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“…It is found that the temperature anomaly disappears when the power FET employs a metal interconnect scheme that does not rely on aluminum bussing. Such a power FET is metallized with interdigitated source and drain fingers and bussing is done with post-sinter power copper metal [2]. See Fig.…”

Section: Introductionmentioning

confidence: 99%

Anomalous temperature behavior in LDMOS current sensing

Lin

Pendharkar

Hower

et al. 2007

Proceedings of the 19th International Symposium on Power Semiconductor Devices and IC's

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A peculiar temperature mismatch between a power LDMOS and its sense FET develops over time resulting in yield losses. The anomaly is traced to trapped charge in the power LDMOS that arises from a seemingly unrelated change in the hydrogen anneal temperature in the back end. The physical mechanism leading to the anomaly and the interaction between temperature mismatch and metal layout are presented. I. INTRODUCTIONAs smart power IC's perform increasingly more demanding and sophisticated functions, current sensing is often a vital part of circuit design [1]. A current sensor can be used to monitor the load current and provide over-current protection and improved control. Most current sensors are either integrated in close proximity to or imbedded in the power devices. When the power device is MOS, the current ratio between the power FET and the sense FET is always lower than the ratio of the channel widths due to metal debiasing. When current sensing is required over a temperature range, the current ratio is further complicated by temperature variations in the MOS threshold, channel and drift-region mobilities, and metal and via resistances. Knowledge about the temperature-coefficient mismatch (TCMM) between power FET and sense FET becomes crucial for accurate temperature compensation. In this work, an anomalous TCMM is reported for a 50V LDMOS power FET, sense FET pair and the mechanism leading to the anomaly is explained.

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Section: Introductionmentioning

confidence: 99%