Leakage Suppression Approaches in Bulk FinFETs

Khan, T.; Reji, Sincy; Hameed, T. A. Shahul

doi:10.1016/j.matpr.2018.12.038

Cited by 6 publications

(2 citation statements)

References 8 publications

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“…Reducing the gate length degrades the transfer characteristics of planar MOSFETs [2]. Tunnel FETs [3], FinFETs [4], Silicon on Insulator (SOI) FETs [5] as well as CNT-FETs [6] are promising alternatives of MOSFETs to overcome the scaling problems such as short channel effect. On the contrary, in some applications moderately long or long CNTs are used.…”

Section: Introductionmentioning

confidence: 99%

Numerical Study of Long Channel Carbon Nanotube Based Transistors by Considering Variation in CNT Diameter

Dehghani

2020

JNanoR

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While much numerical studies have been done on short channel carbon nanotube field effect transistors (CNT-FETs), there are only a few numerical reports on long channel devices. Long channel CNT-FETs have been widely used in chemical sensors and biosensors as well as light emitters. Therefore, numerical study is helpful for a better understanding of the behavior of such devices. In this paper, we numerically analyze long-channel CNT-FETs by solving the continuity and charge equations self-consistently. To increase the accuracy of simulation, filed-dependent mobility is applied to the equations. Furthermore, a method is proposed to obtain the electrical current of transistors as a function of CNT diameter. Obtained results are in good agreement with the previous experimental data. It is found that compared to a CNT-based resistor, the dependence of current on diameter is much higher in a CNT-FET. Finally, reproducibility of transistors based on the arrays of random CNTs of 1-2 nm diameter in terms of the CNTs number is also investigated.

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Section: Introductionmentioning

confidence: 99%

Numerical Study of Long Channel Carbon Nanotube Based Transistors by Considering Variation in CNT Diameter

Dehghani

2020

JNanoR

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“…[5][6][7][8][9] Nevertheless, FinFETs, on the other hand, have a plethora of issues with respect to efficiency, architecture, patterning, and economic viability to persist continual scaling. [10][11][12][13] Fin structures are necessary for superior efficiency and operation while all the parameters, including thickness, height, and width are shrinking. But to restrict the channel and minimize the SCEs, a higher robust design that could control the channel across all sides is crucial with sub-10 nm technology nodes.…”

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confidence: 99%

Design Insights into Thermal Performance of Vertically Stacked JL-NSFET with High-k Gate Dielectric for Sub 5-nm Technology Node

Valasa¹,

Tayal²,

Thoutam³

2022

ECS J. Solid State Sci. Technol.

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This paper demonstrates the impact of temperature variation on vertically stacked junctionless nanosheet field effect transistor (JL-NSFET) concerning analog/RF performances using different gate lengths (Lg) along with high-k gate dielectrics. A comprehensive analysis of analog/RF performances like transconductance (gm), gate capacitance (Cgg), gate to drain capacitance (Cgd), output conductance (gds), intrinsic gain (Av), maximum oscillation frequency (fMAX), gain frequency product (GFP), and cutoff frequency (fT) is carried out for the temperature range 77-400 K. Note that with the decrease in temperature from 400 to 77 K, there is an improvement in AV, GFP, fT, and fMAX by ~7.43%, ~78.4%, ~78.38%, ~50.9%, respectively. It is also found AV gets degraded with the downscaling of Lg from 16 to 8 nm. However, the same resulted in the improvement of RF performance. From detailed analysis, it is further observed that the usage of high-k gate dielectrics (k=22) in JL-NSFET devices is not suitable due to the depreciation of analog/RF FOMs. Moreover, it is also noted that the improvement in analog/RF performance (ΔFoM = FoM(T=400) – FoM(T=100)) resulted from lowering the temperature can further be improved by downscaling of Lg and by using low-k gate dielectric.

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Design and Compressive Analysis of Junctionless Multigate FinFET Towards Low Power and High Frequency Applications

Kumar¹,

Kumar²

2021

Silicon

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Leakage Suppression Approaches in Bulk FinFETs

Cited by 6 publications

References 8 publications

Numerical Study of Long Channel Carbon Nanotube Based Transistors by Considering Variation in CNT Diameter

Numerical Study of Long Channel Carbon Nanotube Based Transistors by Considering Variation in CNT Diameter

Design Insights into Thermal Performance of Vertically Stacked JL-NSFET with High-k Gate Dielectric for Sub 5-nm Technology Node

Design and Compressive Analysis of Junctionless Multigate FinFET Towards Low Power and High Frequency Applications

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