Lifetime-aware design methodology for dynamic partially reconfigurable systems

Sahoo, Sarbeswar; Nguyen, Tuan D. A.; Veeravalli, Bharadwaj; Kumar, Akash

doi:10.1109/aspdac.2018.8297355

Cited by 9 publications

(3 citation statements)

References 14 publications

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“…Almost all the research works employing DPR assume using homogeneous Partially Reconfigurable Region (PRR) (comprising of equivalent amount of FPGA resources). However, as shown in Figure 11, Sahoo et al [110,111] proposed a hardware/hardware partitioning methodology that allows using application specific heterogeneous PRRs, that provided the scope for improving both the latency (average makespan) and reliability (MTTF) in DPR-based systems. A few papers such as [112][113][114][115][116], have addressed reconfigurable processors in a system with different criticality tasks to improve timing reliability.…”

Section: Reliability Management In Reconfigurable Architecturesmentioning

confidence: 99%

Reliability-Aware Resource Management in Multi-/Many-Core Systems: A Perspective Paper

Sahoo

Ranjbar

Kumar

2021

JLPEA

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With the advancement of technology scaling, multi/many-core platforms are getting more attention in embedded systems due to the ever-increasing performance requirements and power efficiency. This feature size scaling, along with architectural innovations, has dramatically exacerbated the rate of manufacturing defects and physical fault-rates. As a result, in addition to providing high parallelism, such hardware platforms have introduced increasing unreliability into the system. Such systems need to be well designed to ensure long-term and application-specific reliability, especially in mixed-criticality systems, where incorrect execution of applications may cause catastrophic consequences. However, the optimal allocation of applications/tasks on multi/many-core platforms is an increasingly complex problem. Therefore, reliability-aware resource management is crucial while ensuring the application-specific Quality-of-Service (QoS) requirements and optimizing other system-level performance goals. This article presents a survey of recent works that focus on reliability-aware resource management in multi-/many-core systems. We first present an overview of reliability in electronic systems, associated fault models and the various system models used in related research. Then, we present recent published articles primarily focusing on aspects such as application-specific reliability optimization, mixed-criticality awareness, and hardware resource heterogeneity. To underscore the techniques’ differences, we classify them based on the design space exploration. In the end, we briefly discuss the upcoming trends and open challenges within the domain of reliability-aware resource management for future research.

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Section: Reliability Management In Reconfigurable Architecturesmentioning

confidence: 99%

Reliability-Aware Resource Management in Multi-/Many-Core Systems: A Perspective Paper

Sahoo

Ranjbar

Kumar

2021

JLPEA

Self Cite

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Section: Reliability Management In Reconfigurable Architecturesmentioning

confidence: 99%

Design Space Exploration and Resource Management of Multi/Many-Core Systems

2021

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“…The number of processing cores is rising in such systems that results in boosting computing capacity [4]. However, increasing the number of processing cores and aggressive downscaling of feature size have resulted in higher overall power dissipation and power density, respectively, and consequently, elevate processor temperature [5], [6].…”

Section: Introductionmentioning

confidence: 99%

Peak-Power Aware Life-Time Reliability Improvement in Fault-Tolerant Mixed-Criticality Systems

Navardi

Ranjbar

Rohbani

et al. 2022

IEEE Open J. Circuits Syst.

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Mixed-Criticality Systems (MCSs) include tasks with multiple levels of criticality and different modes of operation. These systems bring benefits such as energy and resource saving while ensuring safe operation. However, management of available resources in order to achieve high utilization, low power consumption, and required reliability level is challenging in MCSs. In many cases, there is a trade-off between these goals. For instance, although using fault-tolerance techniques, such as replication, leads to improving the timing reliability, it increases power consumption and can threaten life-time reliability. In this work, we introduce an approach named Life-time Peak Power management in Mixed-Criticality systems (LPP-MC) to guarantee reliability, along with peak power reduction. This approach maps the tasks using a novel metric called Reliability-Power Metric (RPM). The LPP-MC approach uses this metric to balance the power consumption of different processor cores and to improve the life-time of a chip. Moreover, to guarantee the timing reliability of MCSs, a fault-tolerance technique, called task re-execution, is utilized in this approach. We evaluate the proposed approach by a real avionics task set, and various synthetic task sets. The experimental results show that the proposed approach mitigates the aging rate and reduces peak power by up to 20.6% and 17.6%, respectively, compared to state-of-the-art.

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Lifetime-aware design methodology for dynamic partially reconfigurable systems

Cited by 9 publications

References 14 publications

Reliability-Aware Resource Management in Multi-/Many-Core Systems: A Perspective Paper

Reliability-Aware Resource Management in Multi-/Many-Core Systems: A Perspective Paper

Design Space Exploration and Resource Management of Multi/Many-Core Systems

Peak-Power Aware Life-Time Reliability Improvement in Fault-Tolerant Mixed-Criticality Systems

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