Lightweight Emulation of Virtual Channels using Swaps

Parasar, Mayank; Krishna, Tushar

doi:10.1145/3139540.3139541

Cited by 3 publications

(2 citation statements)

References 12 publications

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“…In an adaptive routing algorithm on the other hand, the path for packet transversal from source to destination is dynamically selected based on the condition of the network thereby avoiding congested regions. Several studies have shown that classical fully adaptive routing algorithm is prone to deadlock without Virtual Channels (VCs) ( [9], [10]). [11] propose a routing algorithm called DyAD that combine the advantages of both deterministic and adaptive routing algorithms.…”

Section: Introductionmentioning

confidence: 99%

Comparative Performance Analysis of  Selected Routing Algorithms by Load Variation of 2-Dimensional Mesh Topology Based  Network-On-Chip

Saliu

Momoh²,

Chinedu

et al. 2021

Elektrika

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Network-on-Chip (NoC) has been proposed as a viable solution to the communication challenges on System-on-Chips (SoCs). As the communication paradigm of SoC, NoCs performance depends mainly on the type of routing algorithm chosen. In this paper different categories of routing algorithms were compared. These include XY routing, OE turn model adaptive routing, DyAD routing and Age-Aware adaptive routing. By varying the load at different Packet Injection Rate (PIR) under random traffic pattern, comparison was conducted using a 4 × 4 mesh topology. The Noxim simulator, a cycle accurate systemC based simulator was employed. The packets were modeled as a Poisson distribution; first-in-first-out (FIFO) input buffer channel with a depth of five (5) flits and a flit size of 32 bits; and a packet size of 3 flits respectively. The simulation time was 10,000 cycles. The findings showed that the XY routing algorithm performed better when the PIR is low. In a similar vein, the DyAD routing and Age-aware algorithms performed better when the load i.e. PIR is high.

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Section: Introductionmentioning

confidence: 99%

Comparative Performance Analysis of  Selected Routing Algorithms by Load Variation of 2-Dimensional Mesh Topology Based  Network-On-Chip

Saliu

Momoh²,

Chinedu

et al. 2021

Elektrika

View full text Add to dashboard Cite

show abstract

“…In an adaptive routing algorithm, the path for packet transversal from source to destination is dynamically selected based on the condition of the network thereby avoiding congested regions. Several studies have shown that classical fully adaptive routing algorithm is prone to deadlock without Virtual Channels (VCs) ( [9], [10], [11]). However, the addition of VCs comes with a significant increment in hardware required and complexity in the design of the routers, which potentially brings about increased hardware overhead, power consumption, and network latency [12].…”

Section: Introductionmentioning

confidence: 99%

Age-aware Adaptive Routing for Network-on-Chip Routing with Odd-Even Turn Model

Saliu

Umoh

Sadiq

et al. 2020

IJEEC

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This paper presents an age-aware adaptive routing for Odd-Even (OE) turn model. As packets traverse from source to destination node, their paths are defined by a given routing algorithm. For a selected routing algorithm, an efficient arbitration technique is crucial to sharing critical Network-on-Chip resources. Arbitration techniques provide high degree of local fairness from each router point of view. However, there is delay of a packet with a longer path between the source and destination nodes. In order to address this challenge an age-based arbitration technique is hereby proposed for adaptive routing with OE turn model. The age-aware adaptive routing uses an age-based arbitration technique that gives priority to oldest packet. The performance of the developed age-aware adaptive routing was evaluated using different synthetic traffic at different Packet Injection Rates (PIRs). Results were compared with the result obtained on fair arbitration technique for adaptive routing using average latency and throughput as performance metrics. The result indicated that the age-aware adaptive routing has 2.73%, 6.63 %,5.4% and 4.5 % reduction in latency under random, transpose 1 transpose 2 and bit reversal traffic patterns respectively when compared to fair arbitration adaptive routing with OE turn model. For throughput the results indicated that the age-aware adaptive routing with OE turn model has 14.22%, 13%.12% and 19% increase in throughput under random, transpose 1 transpose 2 and bit reversal traffic patterns respectively when compared to fair arbitration adaptive routing with OE turn model.

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Fast Performance Analysis for NoCs With Weighted Round-Robin Arbitration and Finite Buffers

Mandal

Narayana

Ayoub

et al. 2023

IEEE Trans. VLSI Syst.

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Lightweight Emulation of Virtual Channels using Swaps

Cited by 3 publications

References 12 publications

Comparative Performance Analysis of  Selected Routing Algorithms by Load Variation of 2-Dimensional Mesh Topology Based  Network-On-Chip

Comparative Performance Analysis of  Selected Routing Algorithms by Load Variation of 2-Dimensional Mesh Topology Based  Network-On-Chip

Age-aware Adaptive Routing for Network-on-Chip Routing with Odd-Even Turn Model

Fast Performance Analysis for NoCs With Weighted Round-Robin Arbitration and Finite Buffers

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Lightweight Emulation of Virtual Channels using Swaps

Cited by 3 publications

References 12 publications

Comparative Performance Analysis of Selected Routing Algorithms by Load Variation of 2-Dimensional Mesh Topology Based Network-On-Chip

Comparative Performance Analysis of Selected Routing Algorithms by Load Variation of 2-Dimensional Mesh Topology Based Network-On-Chip

Age-aware Adaptive Routing for Network-on-Chip Routing with Odd-Even Turn Model

Fast Performance Analysis for NoCs With Weighted Round-Robin Arbitration and Finite Buffers

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Comparative Performance Analysis of  Selected Routing Algorithms by Load Variation of 2-Dimensional Mesh Topology Based  Network-On-Chip

Comparative Performance Analysis of  Selected Routing Algorithms by Load Variation of 2-Dimensional Mesh Topology Based  Network-On-Chip