Limitations of rapid thermal processing on ultra-shallow junctions for sub-0.25 mu m MOSFETs

Abstract

Very shallow (-0.1pm) junctions are needed for sub-0.25pm MOSFET devices. These junctions can be made by implanting dopants into silicides and then drive out by RTA. Compared to fumace processed junctions, however, the RTA processed junctions show a higher leakage current, coupled with a nonideal diode behavior. In addition, good junctions processed by fumace annealing showing ideal behavior and low leakage current are converted to leakier non-ideal diodes after an additional RTA. On the other hand, leaky junctions processed by RTA can be "cured" by an additional furnace annealing. We conclude that Rapid Thermal Processing has to be carefully engineered to produce useful shallow junctions for 0.25ym and sub-0.25ym devices.

The leakage current improvement in an ultrashallow junction NMOS with Co silicided source and drain

“…2(a)]. This is another evidence that the dopant movement by the furnace annealing can be disregarded, and the defects and stress curing by the post furnace annealing is more dominant [6].…”

“…1). Thus, it is believed that the post furnace annealing reduces defects including small spikes and stress caused during the CoSi 2 layer formation [6].…”