This review is devoted to recent theoretical studies of the influence exerted by a domain structure in the ferroelectric substrate on the graphene conductance in the graphene-on-ferroelectric structure. An analytical description of the hysteresis memory effect in the field effect transistor based on this structure, which considers absorbed dipole layers on the free graphene surface and localized states at the graphene-ferroelectric interface, is considered. Some theses of a theory recently developed for the conductance of -junctions created by a 180 ∘ -ferroelectric domain structure in a single graphene layer (channel) on the ferroelectric substrate, are analyzed, and various current regimes from the ballistic to diffusion one are considered. The size effects in such systems and a possibility to apply the results obtained to improve the parameters of such devices as field effect transistors with a graphene channel, non-volatile ferroelectric memory cells with random access, and sensors, as well as to miniaturize various devices of functional nanoelectronics are discussed. K e y w o r d s: graphene-on-ferroelectric structure, domain structure, conductance, field effect transistor.