Linearity vs. Q‐factor of loads for RF amplifiers

Kim, Jin-pil; Park, Seong-Su; Lee, Sang‐Gug

doi:10.1002/mop.10896

Cited by 14 publications

(8 citation statements)

References 1 publication

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“…The elimination or the reduction of these parasitic capacitances helps to avoid the signal loss into the silicon substrate, leading to higher power gain [36]. The linearity of the amplifier is affected by the quality factor of the inductor [37]; therefore, and are implemented as off-chip inductors since they are located in the second stage, which dominates the linearity of the overall amplifier. Simulation results indicate that, with a bias current of 3 mA, the circuit can deliver 0 dBm to a 50-load with an output third-order intercept point ( ) of 12 dBm.…”

Section: B Rf Transmittermentioning

confidence: 99%

A Low-Power RF Direct-Conversion Receiver/Transmitter for 2.4-GHz-Band IEEE 802.15.4 Standard in 0.18-$\mu{\hbox {m}}$ CMOS Technology

Nguyen¹,

Krizhanovskii²,

Lee³

et al. 2006

IEEE Trans. Microwave Theory Techn.

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This paper presents a low-power RF receiver/transmitter front-end for 2.4-GHz-band IEEE 802.15.4 standard in 0.18-m CMOS technology. An RF receiver comprises a single-ended low-noise amplifier, a quadrature passive mixer, and a transimpedance amplifier. A current-mode passive mixer showing a very good 1 noise performance is adopted to convert an RF signal directly to a baseband signal. Moreover, this type of passive mixer shows high-linearity performance, leading to overall RF receiver linearity improvement. A low-power, high-linearity transmitter front-end is implemented by using a passive mixer and two-stage driver amplifier in which the first stage is a conventional cascode amplifier and the second stage uses a folded cascode one. The receiver front-end achieves 30-dB voltage conversion gain, 7.3-dB noise figure with 1 noise corner frequency of 70 kHz, 8-dBm input third-order intercept point, and +40-dBm input second-order intercept point. The transmitter front-end shows 12-dB power conversion gain, 0-dBm output power with 10-dBm output third-order intercept point, and 30-dB local-oscilator suppression. The receiver and transmitter front-end dissipate 3.5 and 3 mA from a 1.8-V supply, respectively.Index Terms-CMOS radio, dc offset, driver amplifier (DA), IEEE 802.15.4 transceiver, low-noise amplifier (LNA), low power, 1 noise, passive mixer, transceiver front-end.

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Section: B Rf Transmittermentioning

confidence: 99%

A Low-Power RF Direct-Conversion Receiver/Transmitter for 2.4-GHz-Band IEEE 802.15.4 Standard in 0.18-$\mu{\hbox {m}}$ CMOS Technology

Nguyen¹,

Krizhanovskii²,

Lee³

et al. 2006

IEEE Trans. Microwave Theory Techn.

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“…Moreover as a standalone LNA chip the load inductor is one of the very important components whose Q factor directly influences stability, gain and linearity of the LNA. Lower Q factors improve the stability [9] but decrease the gain very easily by 2 to 3 dB and linearity by 4 dB [14].…”

Section: On-chip Spiral Inductors In Cmos Cascode Lnasmentioning

confidence: 99%

On-chip Electromagnetic Interactions in CMOS Cascode LNAs

Subramanian¹,

Boeck²

2007

2007 IEEE International Workshop on Radio-Frequency Integration Technology

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Target of this work is to explain the significance of electromagnetic effects due to on-chip spiral inductors and passive interconnects on the circuit behavior. Starting from the design aspects of spiral inductors in a cascode CMOS LNA, the influence of their on-chip coupling on the reverse isolation performance of the amplifier will be presented. The importance of the careful consideration of on-chip spiral inductor shielding and substrate coupling effects are detailed and justified by comparison with the measured S-parameter results. Finally, it will be shown that by considering all the on-chip spirals and critical passives through electromagnetic analysis it is possible to estimate very precisely the measured isolation, gain and matching characteristics of a cascode CMOS low noise amplifier around 6 GHz frequency of operation.

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“…4, a simple L-C network using an off-chip inductor L o and an on-chip capacitor C o are used to match the output impedance of DA to 50Ω. The high-Q off-chip inductor L o helps to improve the linearity further [14].…”

Section: B Driver Amplifiermentioning

confidence: 99%

A 900 MHz Low Voltage Low Power Variable Gain CMOS Transmitter Front-end

Nguyen¹,

Lee²,

2005

2005 IEEE Asian Solid-State Circuits Conference

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This paper presents a low-voltage, low-power, variable gain transmitter front-end for 900 MHz ZigBee applications, in a 0.25 µm CMOS technology. The up-mixer achieves a wide range-gain variation by adopting a novel transconductance stage. The measurements show the overall transmitter front-end conversion gain of 16 dB, dB-linear gain variation of over 46 dB with the linearity error less than ± 0.5 dB, output P-1dB of 2 dBm, while dissipating 3 mA from 1.25 V supply.

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Linearity vs. Q‐factor of loads for RF amplifiers

Cited by 14 publications

References 1 publication

A Low-Power RF Direct-Conversion Receiver/Transmitter for 2.4-GHz-Band IEEE 802.15.4 Standard in 0.18-$\mu{\hbox {m}}$ CMOS Technology

A Low-Power RF Direct-Conversion Receiver/Transmitter for 2.4-GHz-Band IEEE 802.15.4 Standard in 0.18-$\mu{\hbox {m}}$ CMOS Technology

On-chip Electromagnetic Interactions in CMOS Cascode LNAs

A 900 MHz Low Voltage Low Power Variable Gain CMOS Transmitter Front-end

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