LIRA-V: Lightweight Remote Attestation for Constrained RISC-V Devices

Shepherd, Carlton; Markantonakis, Konstantinos; Jaloyan, Georges-Axel

doi:10.1109/spw53761.2021.00036

Cited by 18 publications

(9 citation statements)

References 21 publications

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“…If users want to participate in RA services, they must have necessary setups (e.g., stable network) for clouds. Compared to the previous work [22], [35], [42], [43], we are the first to focus on these problems in TEE RA.…”

Section: Real-world Examplesmentioning

confidence: 96%

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School of Mechanical Engineering, Shanghai Jiao Tong University, 200240, Shanghai, China

Zhuang

Huang

et al. 2019

Mathematical Biosciences and Engineering

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The crystallization kinetics and melting behavior of nylon 10,10 in neat nylon 10,10 and in nylon 10,10 -montmorillonite (MMT) nanocomposites were systematically investigated by differential scanning calorimetry. The crystallization kinetics results show that the addition of MMT facilitated the crystallization of nylon 10,10 as a heterophase nucleating agent; however, when the content of MMT was high, the physical hindrance of MMT layers to the motion of nylon 10,10 chains retarded the crystallization of nylon 10,10, which was also confirmed by polarized optical microscopy. However, both nylon 10,10 and nylon 10,10 -MMT nanocomposites exhibited multiple melting be-havior under isothermal and nonisothermal crystallization conditions. The temperature of the lower melting peak (peak I) was independent of MMT content and almost remained constant; however, the temperature of the highest melting peak (peak II) decreased with increasing MMT content due to the physical hindrance of MMT layers to the motion of nylon 10,10 chains.

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Section: Real-world Examplesmentioning

confidence: 96%

“…RA can be implemented as a challenge-response protocol with shared key agreement. Mutual RA [42], [43] is often needed in practice for distributed applications on separate devices. Figure 1 has given an overview of RA workflow and here we further explain the standard terminology [1] used in this paper:…”

Section: Introductionmentioning

confidence: 99%

School of Mechanical Engineering, Shanghai Jiao Tong University, 200240, Shanghai, China

Zhuang

Huang

et al. 2019

Mathematical Biosciences and Engineering

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“…Besides, RISC-V, an open ISA with multiple open source core implementations, ratified the Physical Memory Protection (PMP) instructions, offering similar capabilities to memory protection offered by aforementioned technologies [36]. As such, we also included many emerging academic and proprietary frameworks that capitalise on standard RISC-V primitives, which are Keystone [27], Sanctum [13], TIMBER-V [45] and LIRA-V [42]. Finally, among the many other technologies in the literature, we omitted the TEEs lacking remote attestation mechanisms (e.g., IBM PEF [20]) as well as the TEEs not supported on currently available CPUs (e.g., Intel TDX [37], Realm [5] from Arm CCA [4]).…”

Section: Issuing Attestations Using Teesmentioning

confidence: 99%

“…LIRA-V [42] drafted a mutual remote attestation for constrained edge devices. While this solution does not enable arbitrary code execution in a TEE, it introduces a comprehensive remote attestation mechanism.…”

Section: Risc-v Architecturesmentioning

confidence: 99%

An Exploratory Study of Attestation Mechanisms for Trusted Execution Environments

Ménétrey¹,

Göttel²,

Pasin³

et al. 2022

Preprint

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Attestation is a fundamental building block to establish trust over software systems. When used in conjunction with trusted execution environments, it guarantees that genuine code is executed even when facing strong attackers, paving the way for adoption in several sensitive application domains. This paper reviews existing remote attestation principles and compares the functionalities of current trusted execution environments as Intel SGX, Arm TrustZone and AMD SEV, as well as emerging RISC-V solutions.

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“…Likewise, 32 64-bit registers (MHPMCOUNTER3-MHPMCOUNTER31) are available for generic, vendor-specific programmable HPCs. Note that RISC-V embedded systems are expected to possess only M-or M-and U-modes [27], [28], while workstations and servers are expected to support supervisor (S)-mode and the forthcoming hypervisor (H)-mode extensions [11].…”

Section: Risc-vmentioning

confidence: 99%

Investigating Black-Box Function Recognition Using Hardware Performance Counters

Shepherd¹,

Semal²,

Markantonakis³

2022

Preprint

Self Cite

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This paper presents new methods and results for learning information about black-box program functions using hardware performance counters (HPC), where an investigator can only invoke and measure function calls. Important use cases include analysing compiled libraries, e.g. static and dynamic link libraries, and trusted execution environment (TEE) applications. We develop a generic machine learning-based approach to classify a comprehensive set of hardware events, e.g. branch mis-predictions and instruction retirements, to recognise standard benchmarking and cryptographic library functions. This includes various signing, verification and hash functions, and ciphers in numerous modes of operation. Three major architectures are evaluated using off-the-shelf Intel/X86-64, ARM, and RISC-V CPUs. Following this, we develop and evaluate two use cases. Firstly, we show that several known CVE-numbered OpenSSL vulnerabilities can be detected using HPC differences between patched and unpatched library versions. Secondly, we demonstrate that standardised cryptographic functions executing in ARM TrustZone TEE applications can be recognised using non-secure world HPC measurements. High accuracy was achieved in all cases (86.22-99.83%) depending on the application, architectural, and compilation assumptions. Lastly, we discuss mitigations, outstanding challenges, and directions for future research.

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LIRA-V: Lightweight Remote Attestation for Constrained RISC-V Devices

Cited by 18 publications

References 21 publications

School of Mechanical Engineering, Shanghai Jiao Tong University, 200240, Shanghai, China

School of Mechanical Engineering, Shanghai Jiao Tong University, 200240, Shanghai, China

An Exploratory Study of Attestation Mechanisms for Trusted Execution Environments

Investigating Black-Box Function Recognition Using Hardware Performance Counters

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