Local stress engineering for the optimization of p-GaN gate HEMTs power devices

Abstract

The impact of the built-in stress of the SiN passivation layer on p-GaN gate High Electron Mobility transistors (HEMTs) is investigated through TCAD simulations. Local modifications of electron confinement in the channel area due to stressor deposition can be exploited to increase the threshold voltage independently of the ON-state resistance (up to +1.5 V for tSiN = 200 nm, σSiN = −2 GPa and LG = 0.2 µm). This technique can also be easily combined with an AlGaN backbarrier structure to increase the design margin of p-GaN gate normally-OFF HEMTs.