Lonestar: A suite of parallel irregular programs

Kulkarni, Milind; Burtscher, Martin; Caşcaval, Călin; Pingali, Keshav

doi:10.1109/ispass.2009.4919639

Cited by 140 publications

(92 citation statements)

References 18 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…On the 8-core Intel, two parallel benchmarks (7,9) in Figure 3(b) and eight sequential benchmarks (8)(9)(10)(11)(12)(13)(14)(15)(16) in Figure 2(b) attained max MFLOPS rates while incurring the max average power consumptions. On the other hand, two parallel benchmarks (18,27) in Figure 3(b) and eight sequential benchmarks (4, Figure 2(b) attained max MFLOPS rates while incurring the least average power consumption.…”

Section: Terminologiesmentioning

confidence: 99%

Studying the impact of application-level optimizations on the power consumption of multi-core architectures

Rahman

Guo

Bhat

et al. 2012

Proceedings of the 9th Conference on Computing Frontiers

View full text Add to dashboard Cite

This paper studies the overall system power variations of two multi-core architectures, an 8-core Intel and a 32-core AMD workstation, while using these machines to execute a wide variety of sequential and multi-threaded benchmarks using varying compiler optimization settings and runtime configurations. Our extensive experimental study provides insights for answering two questions: 1) what degrees of impact can application level optimizations have on reducing the overall system power consumption of modern CMP architectures; and 2) what strategies can compilers and application developers adopt to achieve a balanced performance and power efficiency for applications from a variety of science and embedded systems domains.

show abstract

Section: Terminologiesmentioning

confidence: 99%

Studying the impact of application-level optimizations on the power consumption of multi-core architectures

Rahman

Guo

Bhat

et al. 2012

Proceedings of the 9th Conference on Computing Frontiers

View full text Add to dashboard Cite

show abstract

“…It is an unguided algorithm. We derived our implementation from the Lonestar benchmark suite [12], and ran our inputs for five timesteps. The inputs are Plummer, the class C input from the Lonestar benchmark suite that contains 1 million bodies of equal mass generated from the Plummer model, and Random, a set of 1 million bodies of equal mass, initialized with random position and velocity.…”

Section: Benchmarksmentioning

confidence: 99%

General transformations for GPU execution of tree traversals

Goldfarb

Kulkarni

2013

Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis

Self Cite

View full text Add to dashboard Cite

With the advent of programmer-friendly GPU computing environments, there has been much interest in offloading workloads that can exploit the high degree of parallelism available on modern GPUs. Exploiting this parallelism and optimizing for the GPU memory hierarchy is well-understood for regular applications that operate on dense data structures such as arrays and matrices. However, there has been significantly less work in the area of irregular algorithms and even less so when pointer-based dynamic data structures are involved. Recently, irregular algorithms such as Barnes-Hut and kd-tree traversals have been implemented on GPUs, yielding significant performance gains over CPU implementations. However, the implementations often rely on exploiting application-specific semantics to get acceptable performance. We argue that there are general-purpose techniques for implementing irregular algorithms on GPUs that exploit similarities in algorithmic structure rather than application-specific knowledge. We demonstrate these techniques on several tree traversal algorithms, achieving speedups of up to 38× over 32-thread CPU versions.

show abstract

“…A measure of the available parallelism for a given CC graph has been identified in [15] considering, at each temporal step, a maximal independent set of the CC graph. The expected size of a maximal independent set gives a reasonable and computable estimate of the available parallelism.…”

Section: Proposition 1 the Conflict Ratio Functionr(m) Is Non-decreamentioning

confidence: 99%

Processor Allocation for Optimistic Parallelization of Irregular Programs

Versaci

Pingali

2012

Computational Science and Its Applications – ICCSA 2012

Self Cite

View full text Add to dashboard Cite

Optimistic parallelization is a promising approach for the parallelization of irregular algorithms: potentially interfering tasks are launched dynamically, and the runtime system detects conflicts between concurrent activities, aborting and rolling back conflicting tasks. However, parallelism in irregular algorithms is very complex. In a regular algorithm like dense matrix multiplication, the amount of parallelism can usually be expressed as a function of the problem size, so it is reasonably straightforward to determine how many processors should be allocated to execute a regular algorithm of a certain size (this is called the processor allocation problem). In contrast, parallelism in irregular algorithms can be a function of input parameters, and the amount of parallelism can vary dramatically during the execution of the irregular algorithm. Therefore, the processor allocation problem for irregular algorithms is very difficult.In this paper, we describe the first systematic strategy for addressing this problem. Our approach is based on a construct called the conflict graph, which (i) provides insight into the amount of parallelism that can be extracted from an irregular algorithm, and (ii) can be used to address the processor allocation problem for irregular algorithms. We show that this problem is related to a generalization of the unfriendly seating problem and, by extending Turán's theorem, we obtain a worst-case class of problems for optimistic parallelization, which we use to derive a lower bound on the exploitable parallelism. Finally, using some theoretically derived properties and some experimental facts, we design a quick and stable control strategy for solving the processor allocation problem heuristically.

show abstract

Lonestar: A suite of parallel irregular programs

Cited by 140 publications

References 18 publications

Studying the impact of application-level optimizations on the power consumption of multi-core architectures

Studying the impact of application-level optimizations on the power consumption of multi-core architectures

General transformations for GPU execution of tree traversals

Processor Allocation for Optimistic Parallelization of Irregular Programs

Contact Info

Product

Resources

About