Loop Subgraph-Level Greedy Mapping Algorithm for Grid Coarse-Grained Reconfigurable Array

Abstract

To solve the problem of grid coarse-grained reconfigurable array task mapping under multiple constraints, we propose a Loop Subgraph-Level Greedy Mapping (LSLGM) algorithm using parallelism and processing element fragmentation. Under the constraint of a reconfigurable array, the LSLGM algorithm schedules node from a ready queue to the current reconfigurable cell array block. After mapping a node, its successor's indegree value will be dynamically updated. If its successor's indegree is zero, it will be directly scheduled to the ready queue; otherwise, the predecessor must be dynamically checked. If the predecessor cannot be mapped, it will be scheduled to a blocking queue. To dynamically adjust the ready node scheduling order, the scheduling function is constructed by exploiting factors, such as node number, node level, and node dependency. Compared with the loop subgraph-level mapping algorithm, experimental results show that the total configuration cycle of the LSLGM algorithm decreases by an average of 32.9% (PEA 4 4 ) and 33.9% (PEA 7 7 ). Compared with the epimorphism map algorithm, the total cycles of the LSLGM algorithm decrease by an average of 38.4% (PEA 4 4 ) and 35.2% (PEA 7 7 ). The feasibility of LSLGM is verified.