Lorentz Chaotic System key generation with Low Area FPGA Implementation using Present Security Algorithm

Abstract

Recently, the study of lightweight symmetric ciphers has gained more importance because of high requirement in the services for security in the CCNs (Constrained Computing Environments): Wireless Sensor Network (WSN), Internet of Things (IoT). A lightweight cipher is a cryptographic algorithm which is used for low resource device, minimal area optimization, low power design and attains sufficient security level. Size of the key is considered as major challenges in the cryptographic algorithms, because it increases the complexity of the cryptographic algorithm. To overcome this issue and improve the security, Lorentz Chaotic System (LCS) based PRESENT architecture is introduced in this research. The PRESENT lightweight block cipher is selected due to it is most general and famous lightweight algorithms. Hence, the random numbers were generated for a key purpose by using an LCS circuit. The streaming data will be encrypt and decrypt by using this algorithm. In this research, the modified lightweight block cipher algorithm is called as LCS-PRESENT architecture. Finally, the performance of LCS -PRESENT architecture was evaluated by FPGA hardware utilizations such as Lookup Table (LUT), flip flop, slices, and frequency. The security level of LCS-PRESENT architecture was analysed based on encrypted and decrypted results in XILINX tool. The LCS-PRESENT architecture utilizes the FPGA device to attain maximum accuracy and throughput, such as 30 of LUTs, 115 of flip flops and 47 of slices from available sources compared to existing cryptographic algorithms.