Low-Cost Concurrent Error Detection for Floating-Point Unit (FPU) Controllers

Maniatakos, Michail; Kudva, P.; Fleischer, Bruce; Makris, Yiorgos

doi:10.1109/tc.2012.81

Cited by 11 publications

(6 citation statements)

References 27 publications

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“…In the case of soft errors, the process continues, but the failure affects the execution through "bit-flips." Fault tolerance techniques can then be categorized as hardware-based fault tolerance (HBFT) [50,53], system software-based fault tolerance (SBFT) [10,12,14,29,63], and algorithm-based fault tolerance (ABFT) [18,22,31,43,49]. For a general overview and a classification, we refer the reader to [19,20,21].…”

mentioning

confidence: 99%

Resilience for Massively Parallel Multigrid Solvers

Huber¹,

Gmeiner²,

Rüde³

et al. 2016

SIAM J. Sci. Comput.

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Fault tolerant massively parallel multigrid methods for elliptic partial differential equations are a step towards resilient solvers. Here, we combine domain partitioning with geometric multigrid methods to obtain fast and fault-robust solvers for three-dimensional problems. The recovery strategy is based on the redundant storage of ghost values, as they are commonly used in distributed memory parallel programs. In the case of a fault, the redundant interface values can be easily recovered, while the lost inner unknowns are recomputed approximately with recovery algorithms using multigrid cycles for solving a local Dirichlet problem. Different strategies are compared and evaluated with respect to performance, computational cost, and speedup. Especially effective are asynchronous strategies combining global solves with accelerated local recovery. By this, multiple faults can be fully compensated with respect to both the number of iterations and run-time. For illustration, we use a state-of-the-art petascale supercomputer to study failure scenarios when solving systems with up to 6 • 10 11 (0.6 trillion) unknowns.

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mentioning

confidence: 99%

Resilience for Massively Parallel Multigrid Solvers

Huber¹,

Gmeiner²,

Rüde³

et al. 2016

SIAM J. Sci. Comput.

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“…Modern processor architectures usually handle variables with 32 or 64 bits. Arithmetic and logic unities and floating-point unities are present in modern CPUs to perform floating point operations, in which real numbers are usually expressed in the IEEE-754 standard [27]. Figure 5 shows the binary representation of a double precision floating-point number in the IEEE-754 standard.…”

Section: 22mentioning

confidence: 99%

Learning-Based Mitigation of Soft Error Effects on Quaternion Kalman Filter Processing

Kraemer Sarzi Sartori,

Fourati,

Bastos

2024

IEEE Sensors J.

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This paper proposes a novel mitigation technique for soft error effects on the attitude estimation (AE) processing for spacecrafts, especially for satellites' application. Specially, we are focused on the soft errors that occur in space and affect, for example, the quaternion Kalman filter, running on the processor of control system of satellite, which leads to invert bits of the estimated states, miscalculations and a decreased performance. The mitigation technique detects first the presence of soft error effects on the AE algorithm output using some residuals. Then the residuals are passed to a trained Machine Learning (ML) models to estimate the quaternion error that will be used to correct the estimations. A supervised regression solution was proposed to correct the soft error effects, in which a methodology for creating a dataset for training classical ML models was developed. The results from the case-study scenario show a high reduction of soft error effects, while adding little overhead to the Kalman filter processing.

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“…It could be performed at the numerical method [5] level. It also could be used at the hardware level by comparing floating-point results of a normal operator with the ones of an approximate operator [37,40,75].…”

Section: Mitigating Silent Data Corruptionsmentioning

confidence: 99%

Toward Exascale Resilience: 2014 update

Cappello

Geist

Gropp

et al. 2014

JSFI

101

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Resilience is a major roadblock for HPC executions on future exascale systems. These systems will typically gather millions of CPU cores running up to a billion threads. Projections from current large systems and technology evolution predict errors will happen in exascale systems many times per day. These errors will propagate and generate various kinds of malfunctions, from simple process crashes to result corruptions.The past five years have seen extraordinary technical progress in many domains related to exascale resilience. Several technical options, initially considered inapplicable or unrealistic in the HPC context, have demonstrated surprising successes. Despite this progress, the exascale resilience problem is not solved, and the community is still facing the difficult challenge of ensuring that exascale applications complete and generate correct results while running on unstable systems. Since 2009, many workshops, studies, and reports have improved the definition of the resilience problem and provided refined recommendations. Some projections made during the previous decades and some priorities established from these projections need to be revised. This paper surveys what the community has learned in the past five years and summarizes the research problems still considered critical by the HPC community.

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Low-Cost Concurrent Error Detection for Floating-Point Unit (FPU) Controllers

Cited by 11 publications

References 27 publications

Resilience for Massively Parallel Multigrid Solvers

Resilience for Massively Parallel Multigrid Solvers

Learning-Based Mitigation of Soft Error Effects on Quaternion Kalman Filter Processing

Toward Exascale Resilience: 2014 update

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