Proceedings of the 2019 Great Lakes Symposium on VLSI 2019
DOI: 10.1145/3299874.3317989
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Low Cost Hybrid Spin-CMOS Compressor for Stochastic Neural Networks

Abstract: With expansion of neural network (NN) applications lowering their hardware implementation cost becomes an urgent task especially in back-end applications where the power-supply is limited. Stochastic computing (SC) is a promising solution to realize low-cost hardware designs. Implementation of matrix multiplication has been a bottleneck in previous stochastic neural networks (SC-NNs). In this paper, we introduce spintronic components into the design of SC-NNs. A novel spin-CMOS matrix multiplier is proposed in… Show more

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