“…Many institutions have reported so far the Si surface flattening process [17,18,19,20], and MOSFETs with atomically flat interface at Si/gate insulator show higher performances than those with conventional devices [21,22,23,24]. The 1/f noise in MOSFETs with Si/high-k gate stacks has also been reported [25,26]. However, there have been few report for the influence of Si surface roughness on the high-k gate insulator formation.…”