Low-Latency Reconfigurable Entropy Digital True Random Number Generator With Bias Detection and Correction

Carreira, Leonardo Bosco; Danielson, Paige; Rahimi, Arya A.; Luppe, Maximiliam; Sk, Gupta

doi:10.1109/tcsi.2019.2960694

Cited by 23 publications

(9 citation statements)

References 19 publications

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“…PUFs are good examples of devices designed for these purposes (see Section 3.1.4 ). Furthermore, entropy plays a significant role in recent research on truly random number generation [ 96 , 99 ]. Future researchers may consider reviewing the role of other concepts, such as chaos and complexity, in cryptography.…”

Section: Discussionmentioning

confidence: 99%

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The Odyssey of Entropy: Cryptography

Zolfaghari

Bibak

Koshiba

2022

Entropy

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After being introduced by Shannon as a measure of disorder and unavailable information, the notion of entropy has found its applications in a broad range of scientific disciplines. In this paper, we present a systematic review on the applications of entropy and related information-theoretical concepts in the design, implementation and evaluation of cryptographic schemes, algorithms, devices and systems. Moreover, we study existing trends, and establish a roadmap for future research in these areas.

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Section: Discussionmentioning

confidence: 99%

“…The criticality of entropy in research on true random number generators is due to the fact that their susceptibility to process variations as well as intrusion attacks, degrades the generated entropy. This makes it necessary to include an on-the-fly mechanism for the detection and correction of bias variations [ 99 ].…”

Section: Entropy and Encryptionmentioning

confidence: 99%

The Odyssey of Entropy: Cryptography

Zolfaghari

Bibak

Koshiba

2022

Entropy

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“…A TRNG is a hardware system that generates a sequence of random numbers without the need of an initial seed and it is based on the unpredictability of some physical phenomena such as thermal noise, phase noise and quantum phenomena that are typically exploited in analog circuits [1]. On the other hand, a lot of effort has been recently focused towards the design of fully digital TRNGs to be implemented on Field Programmable Gate Arrays (FPGAs) due to their widely adoption [2]- [17]. Typically, the existing designs rely on metastability [2]- [4] and jitter [5]- [13], where the randomness is commonly extracted by Look-up Table (LUT)based Programmable Delay Lines (PDLs) and free running Ring Oscillators (ROs).…”

Section: Introductionmentioning

confidence: 99%

A High-Speed FPGA-Based True Random Number Generator Using Metastability With Clock Managers

Frustaci

Spagnolo

Perri

et al. 2023

IEEE Trans. Circuits Syst. II

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True random number generators (TRNGs) are fundamentals in many important security applications. Though they exploit randomness sources that are typical of the analog domain, digital-based solutions are strongly required especially when they have to be implemented on Field Programmable Gate Array (FPGA)-based digital systems. This paper describes a novel methodology to easily design a TRNG on FPGA devices. It exploits the runtime capability of the Digital Clock Manager (DCM) hardware primitives to tune the phase shift between two clock signals. The presented auto-tuning strategy automatically sets the phase difference of two clock signals in order to force on one or more flip-flops (FFs) to enter the metastability region, used as a randomness source. Moreover, a novel use of the fast carry-chain hardware primitive is proposed to further increase the randomness of the generated bits. Finally, an effective on-chip post-processing scheme that does not reduce the TRNG throughput is described. The proposed TRNG architecture has been implemented on the Xilinx Zynq XC7Z020 System on Chip (SoC). It passed all the National Institute of Standards and Technology (NIST) SP 800-22 statistical tests with a maximum throughput of 300×10 6 bit per second. The latter is considerably higher than the throughput of other previously published DCMbased TRNGs.

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“…The reported literature on RO‐based TRNG was implemented in field‐programmable gate array 6,8–11 or application‐specific integrated circuit 12–17 . Johnson et al 8 proposed an energy‐efficient and tunable TRNG to optimize the randomness quality.…”

Section: Introductionmentioning

confidence: 99%

A true random number generator with high bit rate and low energy efficiency

Cheng

Zhang

Zhu

et al. 2023

Circuit Theory & Apps

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Summary In this paper, a novel feedback architecture of true random number generator based on tetrahedral ring oscillator is proposed. The random raw bits are fed back to produce control voltages, which control the transmission gates in ring oscillators. Since random fluctuations of the control voltages increase the phase jitter of the oscillator, this architecture improves the bit rate and randomness of random sequence. Besides, a post‐processor is designed to enhance the randomness further. The circuit is implemented in TSMC 40‐nm complementary metal oxide semiconductor (CMOS) process, and it takes up an area of 85 × 51 μm. Measurement results show that the random number sequences pass the statistical randomness tests, with a low power consumption of 67 μW, high speed of 45 Mbps, and low energy efficiency of 1.48 pJ/bit.

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Low-Latency Reconfigurable Entropy Digital True Random Number Generator With Bias Detection and Correction

Cited by 23 publications

References 19 publications

The Odyssey of Entropy: Cryptography

The Odyssey of Entropy: Cryptography

A High-Speed FPGA-Based True Random Number Generator Using Metastability With Clock Managers

A true random number generator with high bit rate and low energy efficiency

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