Low loss mode size converter from 0.3 µm square Si wire waveguides to singlemode fibres

Shoji, Tetsufumi; Tsuchizawa, Tai; Watanabe, T.; Yamada, Koji; Morita, Hirofumi

doi:10.1049/el:20021185

Cited by 449 publications

(203 citation statements)

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“…Several approaches have been followed to tackle the problem. A very elegant solution is the inverted taper approach, for which low loss and broadband operation were demonstrated in [1]- [3]. These structures however still require lensed or high numerical aperture fiber for a reduced optical mode size.…”

mentioning

confidence: 99%

Compact and Highly Efficient Grating Couplers Between Optical Fiber and Nanophotonic Waveguides

Laere

Roelkens

Ayre

et al. 2007

J. Lightwave Technol.

341

172

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Abstract-We present high-efficiency grating couplers for coupling between a single-mode fiber and nanophotonic waveguides, fabricated both in silicon-on-insulator (SOI) and InP membranes using BenzoCycloButene wafer bonding. The coupling efficiency is substantially increased by adding a gold bottom mirror to the structures. The measured coupling efficiency to fiber is 69% for SOI grating couplers and 56% for bonded InP membrane grating couplers.

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mentioning

confidence: 99%

Compact and Highly Efficient Grating Couplers Between Optical Fiber and Nanophotonic Waveguides

Laere

Roelkens

Ayre

et al. 2007

J. Lightwave Technol.

341

172

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“…When considering high-density circuit, it is indispensable to reduce the footprint of these tapers. Since the taper length depends predominantly on the starting and ending waveguide width and effective index, the transition between a grating coupler and a single-mode photonic waveguide in any material platform is one of the largest [33][34][35][36][37]. Thus, it is extremely advantageous to have non-adiabatic tapers along with linear GCs for a compact spot-size converter.…”

Section: Linear Grating Based Compact Tapersmentioning

confidence: 99%

“…A taper 5.5 µm long based on high refractive index materials has been shown but its fabrication is cumbersome and requires several steps [36]. Edge coupling based inverse tapers to enhance the mode size of the waveguide through evanescent field coupling have also been designed with low loss and broadband operation but they are disadvantaged by back reflections and long lengths [37]. Almeida et al have proposed a short taper (40 µm) for compact mode conversion with mode mismatch loss of -0.26 dB and back reflection less than -48 dB, which require a very high precision fabrication for realization of the nano-sized tip [6].…”

Section: Linear Grating Based Compact Tapersmentioning

confidence: 99%

Grating-Assisted Fiber to Chip Coupling for SOI Photonic Circuits

2018

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Fiber to chip coupling is a critical aspect of any integrated photonic circuit. In terms of ease of fabrication as well as wafer-scale testability, surface grating couplers are by far the most preferred scheme of the coupling to integrated circuits. In the past decade, considerable effort has been made for designing efficient grating couplers on Silicon-on-Insulator (SOI) and other allied photonic platforms. Highly efficient grating couplers with sub-dB coupling performance have now been demonstrated. In this article, we review the recent advances made to develop grating coupler designs for a variety of applications on SOI platform. We begin with a basic overview of design methodology involving both shallow etched gratings and the emerging field of subwavelength gratings. The feasibility of reducing footprint by way of incorporating compact tapers is also explored. We also discuss novel grating designs like polarization diversity as well as dual band couplers. Lastly, a brief description of various packaging and wafer-scale testing schemes available for fiber-chip couplers is elaborated.

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“…Improving the coupling effi ciency is therefore a major task in device engineering to facilitate the further commercialization of OEICs. End-fi re coupling techniques using inverse tapers [52,53], grating directional couplers [54] and 3D tapers [55] as mode converter have been studied. Coupling effi ciency of better than -1 dB can normally be achieved using the inverse taper approach, the best results for which, 0.25 dB polarization-insensitive coupling loss and a 1 dB bandwidth of 150 nm, were obtained recently by Bakir et al [56].…”

Section: Fiber-chip Couplingmentioning

confidence: 99%

Device engineering for silicon photonics

Chen

Tsang

2011

NPG Asia Mater

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A fter an impressive initial spurt of progress in device engineering during the early 2000s when the optical communications industry saw unprecedented levels of investment, silicon photonics continues to develop at an amazing pace. Many novel applications and devices are emerging. Silicon photonics has the potential to become a major platform for optoelectronic integrated circuits (OEICs) and to be used in high-speed optical interconnects for chip-level data communications because of the extremely large bandwidth and high speed off ered by optical communications. Many challenges have been addressed through the introduction of innovative ideas, paving the way for the practical deployment of silicon-based optoelectronic devices and integrated photonic circuits in computing and telecommunication systems [1]. Th e commercialization of silicon photonics, originally driven by applications in telecommunications, is now also driven by the needs of the computing industry for highspeed, energy-effi cient optical cable technology, such as the Light Peak Technology under development by Intel (USA). Th e California-based company Luxtera (USA) has also commercialized a series of siliconphotonic transceiver systems.Silicon off ers many advantages over alternative material systems (e.g. InP, GaAs, LiNbO 3 ) for OEIC applications. One major reason for the wide interest that silicon photonics is attracting is the cost advantage that silicon photonics can potentially off er through its compatibility with the complementary metal-oxide-semiconductor (CMOS) fabrication processes used in the microelectronics industry. Th e huge investments that have been made in CMOS microelectronics fabrication technologies has resulted in processes that off er much higher yield than is possible using alternative materials for photonics, thus making feasible large-scale integration and the production of silicon-photonic devices that are monolithically integrated with not only optical components but also electronic circuits in the same platform at ultrahigh density. Another reason for the attractiveness of silicon photonics is the high refractive index contrast between the silicon core (refractive index, 3.48) and silicon dioxide cladding (refractive index, 1.45) in silicon-on-insulator (SOI) devices, which ensures the submicrometer confi nement of light and allows tight bending in optical waveguides. Th e high-density integration of photonic circuits on SOI platforms is thus feasible. Th e low cost of high-quality SOI wafers is another advantage of silicon photonics. All kinds of low-cost devices enabled by silicon photonics are therefore predicted, and these may also enjoy the other benefi ts of monolithic integration: smaller size, increased power effi ciency and improved reliability. Figure 1 shows an example of a high-density integrated photonics devices fabricated on a 6-inch SOI wafer using CMOS-compatible technology.In this article, we review some of the exciting progress that has been made in silicon photonics with the aim of providing a broa...

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Low loss mode size converter from 0.3 µm square Si wire waveguides to singlemode fibres

Cited by 449 publications

References 1 publication

Compact and Highly Efficient Grating Couplers Between Optical Fiber and Nanophotonic Waveguides

Compact and Highly Efficient Grating Couplers Between Optical Fiber and Nanophotonic Waveguides

Grating-Assisted Fiber to Chip Coupling for SOI Photonic Circuits

Device engineering for silicon photonics

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