Low Noise Amplifier for ECG Signals

Bansal, Malti; Sagar, Ishita

doi:10.1109/icisc47916.2020.9171200

Cited by 6 publications

(2 citation statements)

References 22 publications

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“…Some scholars use UFIR Smoother, state-space representation and establish a harmonic model to theoretically find the best horizon and test it, and finally achieve a good signal-to-noise ratio [5]. Researchers designed a low-noise amplifier (LNA) using a chopper-stabilized amplifier without a lowpass filter [6]. In addition to being used in hospitals, this circuit can also play a role in various wearable devices, such as smart watches, bracelets, and portable ECG monitors.…”

Section: Introductionmentioning

confidence: 99%

Design and optimization of a circuit for ECG signal processing using 180nm technology

Lu,

Sun,

Yuan

2024

J. Phys.: Conf. Ser.

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In the medical industry, electrocardiogram (ECG) plays a decisive role in helping people diagnose different diseases. This article applies the designed high-performance differential amplifier to the amplification and denoising of ECG signals, using TSMC 180nm CMOS process and a 1.8V power supply. The differential pair is used to suppress common-mode signals and amplify differential effective signals. The tail current stabilizes the working status of the device and helps achieve a better common mode rejection ratio and linearity. Considering actual manufacturing, the ideal current source in the circuit is replaced with a proportional current mirror (composed using MOS transistors) and a linear resistor, even though the ideal current source works better. This article uses CoolSpice to design schematics and simulations and build different circuits to test various parameters, including gain, input common mode range, DC output swing, etc. What is unique is that the circuit is finally connected to the human body model to observe the ECG results. When optimizing, it is very efficient to use Excel to list and process the data obtained from the simulation in CoolSpice into a line chart. After this, the aspect ratios of transistors and tail current are modified to find excellent differential mode gain, common-mode gain, common-mode rejection ratio, power consumption and bandwidth, which are 46.14dB, −45.46dB, 91.6, 36μW and 77.45MHz respectively. For application scenarios with wider bandwidth and lower power consumption, these parameters are also found, which are 42.74dB, −47.07dB, 89.81, 27μW and 144.36MHz respectively.

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Section: Introductionmentioning

confidence: 99%

Design and optimization of a circuit for ECG signal processing using 180nm technology

Lu,

Sun,

Yuan

2024

J. Phys.: Conf. Ser.

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“…When captured from the electrodes, the ECG signals are always accompanied by various types of noise, including flicker noise, power line interference and the offsets caused by the impedance of electrode-skin interface. Because of the characteristics of low amplitude and low frequency and the presence of noise and offsets, it is of high necessity to design an input amplifier circuit with appropriate amplification, adequate noise suppression and sufficient common-mode rejection rate and DC offset cancellation for raw ECG signal recording and subsequent processing and interpretation [4][5][6]. Moreover, the designed amplifier circuits are required to have high input impedance for safety reasons and low output impedance to minimise distortion [5].…”

Section: Introductionmentioning

confidence: 99%

Current state and challenges of ECG amplifiers

Chen¹,

Wang²,

Zhou³

2023

HSET

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This paper describes and compares three amplifiers for ECG recording, namely a four-transistor stage band-pass amplifier, a DDA-based fully differential CMOS instrumentation amplifier and an OTA amplifier using current reuse. The performance metrics of the three amplifiers are listed, their respective advantages are compared, what factors limit their disadvantages are analyzed, the current state of the art and the direction of development of the ECG amplifier are indicated, and suggestions are given for further enhancement of the ECG amp. These amplifier circuits are designed in 0.35 µm CMOS and are verified by layout followed by simulation simulations. The results show that running at 2V dc supply, the quad-transistor stage amplifier and the DDA fully differential amplifier consume 672nW, obtain at least 2uVrms of input reference noise, and obtain greater common mode rejection ratios of 86dB and 83dB, while the OTA amplifier consumes less 320nW, obtains the most 2.05uVrms of input reference noise, and obtains a smaller common-mode rejection ratio of 65dB.

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Design Considerations for Low Noise Amplifier

Bansal

Sagar

2021

Inventive Systems and Control

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Low Noise Amplifier for ECG Signals

Cited by 6 publications

References 22 publications

Design and optimization of a circuit for ECG signal processing using 180nm technology

Design and optimization of a circuit for ECG signal processing using 180nm technology

Current state and challenges of ECG amplifiers

Design Considerations for Low Noise Amplifier

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