Abstract:Fault-tolerance is an important system metric for many operating environments, from automotive to space exploration. The conventional technique for improving system reliability is through component replication, which usually comes at significant cost: increased design time, testing, power consumption, volume, and weight. We have developed a new faulttolerance approach that capitalizes on the unique reconfiguration capabilities of field programmable gate arrays (FPGA's). The physical design is partitioned into … Show more
“…Most of the earlier works focused on tolerating the manufacturing defects and aging faults and manufacturing defects at either device level or configuration level using offline FT methods [2], [10]- [15]. However, provision of online FT is required to cater SEUs and software faults.…”
Abstract-Thedynamically reconfigurable Field Programmable Gate Arrays (FPGAs) are most frequently employed for developing adaptive embedded systems. They are also being increasingly used as co-processors in high performance computing applications. For these systems to be fielded in harsh environments such as those encountered in space, extra-terrestrial locations and regions of extreme conditions on the earth, one must adopt fault tolerant design techniques to ensure uninterrupted and reliable operation despite the occurrence of faults. Commercial Off-the-Shelf (COTS) FPGA components offer a cost effective design trajectory where the designer can choose among a rich variety of FT approaches and techniques. This paper compares the various FT techniques and proposes a novel method in which these techniques can work together to provide a synergetic approach for fault tolerant FPGA design.
“…Most of the earlier works focused on tolerating the manufacturing defects and aging faults and manufacturing defects at either device level or configuration level using offline FT methods [2], [10]- [15]. However, provision of online FT is required to cater SEUs and software faults.…”
Abstract-Thedynamically reconfigurable Field Programmable Gate Arrays (FPGAs) are most frequently employed for developing adaptive embedded systems. They are also being increasingly used as co-processors in high performance computing applications. For these systems to be fielded in harsh environments such as those encountered in space, extra-terrestrial locations and regions of extreme conditions on the earth, one must adopt fault tolerant design techniques to ensure uninterrupted and reliable operation despite the occurrence of faults. Commercial Off-the-Shelf (COTS) FPGA components offer a cost effective design trajectory where the designer can choose among a rich variety of FT approaches and techniques. This paper compares the various FT techniques and proposes a novel method in which these techniques can work together to provide a synergetic approach for fault tolerant FPGA design.
“…In an increasing number of countries, whether developed or developing, IPR has become a fixed plank in the notes address of the Government`s key office holder. It is in those countries, with a high level of awareness that the integration of intellectual property appears to be successfully in progress [3], [5]. The government should make it very clear exactly what its vision and strategy for the country is, including the goals and objectives, and the timeframe.…”
Section: Preambles In Ipr`s Expansionmentioning
confidence: 99%
“…Therefore, successful IPRs protection is about producing effective, commercially driven results [3], [5]. Like any other facet of business, IPRs protection needs to demonstrate a return on investment.…”
The focal objective of this article is to analyze the role of intellectual property rights in technological implications within a general context. The performance of the IPRs system and its interaction with national innovation system with some degrees of success has also been highlighted. Major encounter over subsequently decade will be to identify policies and solutions that would permit marketplace economy to flourish in the framework of this intellectual property insurrection. There has been a lot of dispute on the role of intellectual property protection regime specially in fostering innovation, technology development of a country. IPRs are expected to emboli the innovation, by rewarding inventor with a grant of domination rights over the mercantile exploitation for a specified time period. This article tries to attempts to review the role of the IPR regime in technological development and also have suggested some policy implications for country like Pakistan and some reflecting lessons for other developing countries with similar settings and common characteristics.
“…However, STARS is a successful example of a method that uses exhaustive online testing to realize regeneration. Methods proposed by Lohn [Lohn03] and Lach [Lach98] either rely on offline regeneration supported by exhaustive functional testing, or pre-determined spares defined at design-time. Of the methods in Table I, only Keymeulen, Stoica, and Zebulum [1] investigate the possibility of using a population-based approach to desensitize circuits to faults.…”
Section: Offline Refurbishment With Exhaustive Functional Testingmentioning
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.