Low Power and Energy Efficient Asynchronous Design

Beerel, Peter A.; Roncken, Marly

doi:10.1166/jolpe.2007.138

Cited by 22 publications

(10 citation statements)

References 64 publications

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“…Pirretti et al [30] and Bertozzi et al [31] propose NoC routing algorithms that can route tasks around the fault and sustain network functionality. Also research on router design to improve reliability [32], buffer flow control [33] and error correction techniques [34,35] for NoC have been proposed. Koibuchi et al [36] proposed a lightweight fault-tolerant mechanism called default backup path (DBP).…”

Section: Mpsoc Design Literature Reviewmentioning

confidence: 99%

Framework for Simulation of Heterogeneous MpSoC for Design Space Exploration

Tafesse

Muthukumar

2013

VLSI Design

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Due to the ever-growing requirements in high performance data computation, multiprocessor systems have been proposed to solve the bottlenecks in uniprocessor systems. Developing efficient multiprocessor systems requires effective exploration of design choices like application scheduling, mapping, and architecture design. Also, fault tolerance in multiprocessors needs to be addressed. With the advent of nanometer-process technology for chip manufacturing, realization of multiprocessors on SoC (MpSoC) is an active field of research. Developing efficient low power, fault-tolerant task scheduling, and mapping techniques for MpSoCs require optimized algorithms that consider the various scenarios inherent in multiprocessor environments. Therefore there exists a need to develop a simulation framework to explore and evaluate new algorithms on multiprocessor systems. This work proposes a modular framework for the exploration and evaluation of various design algorithms for MpSoC system. This work also proposes new multiprocessor task scheduling and mapping algorithms for MpSoCs. These algorithms are evaluated using the developed simulation framework. The paper also proposes a dynamic fault-tolerant (FT) scheduling and mapping algorithm for robust application processing. The proposed algorithms consider optimizing the power as one of the design constraints. The framework for a heterogeneous multiprocessor simulation was developed using SystemC/C++ language. Various design variations were implemented and evaluated using standard task graphs. Performance evaluation metrics are evaluated and discussed for various design scenarios.

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Section: Mpsoc Design Literature Reviewmentioning

confidence: 99%

Framework for Simulation of Heterogeneous MpSoC for Design Space Exploration

Tafesse

Muthukumar

2013

VLSI Design

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“…All the strategies above are synchronous methods, but asynchronous design is usually known as a powerful low power strategy because asynchronous computational blocks can be designed to consume energy only when and where needed [12]. Asynchronous strategies have been applied to so many low power designs [13,14,15,16,17,18,19,20,21,22,23,24,25,26,27].…”

Section: Introductionmentioning

confidence: 99%

Design of low-power low-area asynchronous iterative multiplier

You

Hei

Jia

et al. 2019

IEICE Electron. Express

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In this paper, a 16 times 16 low-power low-area asynchronous iterative multiplier is proposed. The multiplier diminishes 2 bits at a time with an iterative structure, to filter out the useless switching activities, we employ a finishing detector to dynamically detect the end of the computation and stop iteration ahead of schedule. Additionally, with the employment of finishing detectors, the proposed multiplier could provide a much faster average speed than synchronous approach. Post-layout simulation results show that the asynchronous multiplier offers up to 74% power reduction compared with the synchronous design. Simultaneously, the proposed design also exhibits a prominent area reduction compared with other non-iterative multiplier benefited from the iterative architecture.

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“…In cryptography, encryption [1] is the process of transforming information (referred to as plain text) using an algorithm, called a cipher to make it unreadable to anyone except those possessing special knowledge, usually referred to as a key [1,2]. The result of the process is encrypted information, in cryptography, referred to as cipher text.…”

Section: Introductionmentioning

confidence: 99%