Low Power and High Speed CMOS Circuits

Abstract

Abstract:In recent trends, multi-threshold CMOS technology is advancing to enhance performance of any digital circuits. By use of this technology any digital circuit makes use of both low threshold voltage (VDDL) and high threshold voltage (VDDH) MOSFETs. Propagation delay time of a circuit is reduced by using VDDL and consumption of power is reduced by using VDDH. One of the best techniques to reduce the power consumption is scaling the supply voltage VDD. In order to maintain the generational speed enhancement, the device threshold voltage VTH must also scale down with VDD. This paper proposes a low-power circuit with MTCMOS technology, simulation results shows that power consumption is reduced approximately by61.7%.