Low-power and Low-cost Implementation of SVMs for Smart Sensors

Boni, Andrea; Gasparini, Leonardo; Pianegiani, F.; Petri, Dario

doi:10.1109/imtc.2005.1604187

Cited by 15 publications

(8 citation statements)

References 6 publications

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“…These approaches include using CORDIC algorithms to compute the kernel functions [10], [19], [24], [25]. However, low resource consuming implementations of CORDIC algorithms have increased latency [10].…”

Section: Related Workmentioning

confidence: 99%

“…However, they only consider a single processing module, hence, when adopting a more parallel architecture, to facilitate real-time operation, the additional cost from converting between the decimal number system to the logarithmic one and back again for all inputs increases. The works in [25], [28], [29] [30], have looked at how the bitwidth precision impacts the classification error, in an effort to find the best trade-off between hardware resources, performance and classification rate. Although the kernel operations still need to be implemented with multipliers leading to high resource demands for parallel implementations.…”

Section: Related Workmentioning

confidence: 99%

See 1 more Smart Citation

Embedded Hardware-Efficient Real-Time Classification With Cascade Support Vector Machines

Kyrkou

Bouganis

Theocharides

et al. 2016

IEEE Trans. Neural Netw. Learning Syst.

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Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

Embedded Hardware-Efficient Real-Time Classification With Cascade Support Vector Machines

Kyrkou

Bouganis

Theocharides

et al. 2016

IEEE Trans. Neural Netw. Learning Syst.

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show abstract

“…These approaches include using CORDIC algorithms to compute the kernel functions [11], [24], [27], [30], [31]. However, the iterative operations of these algorithms make it challenging to achieve high performance for applications that require high data throughput such as object detection, since compact implementations of CORDIC algorithms which require less hardware, have increased latency [32].…”

Section: Related Workmentioning

confidence: 99%

Boosting the Hardware-Efficiency of Cascade Support Vector Machines for Embedded Classification Applications

Kyrkou

Theocharides

Bouganis

et al. 2017

Int J Parallel Prog

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Support Vector Machines (SVMs) are considered as a state-of-the-art classification algorithm capable of high accuracy rates for a different range of applications. When arranged in a cascade structure, SVMs can efficiently handle problems where the majority of data belongs to one of the two classes, such as image object classification, and hence can provide speedups over monolithic (single) SVM classifiers. However, the SVM classification process is still computationally demanding due to the number of support vectors. Consequently, in this paper we propose a hardware architecture optimized for cascaded SVM processing to boost performance and hardware efficiency, along with a hardware reduction method in order to reduce the overheads from the implementation of additional stages in the cascade, leading to significant resource and power savings. The architecture was evaluated for the application of object detection on 800×600 resolution images on a Spartan 6 Industrial Video Processing FPGA platform achieving over 30 frames-per-second. Moreover, by utilizing the proposed hardware reduction method we were able to reduce the utilization of FPGA custom-logic resources by ~30%, and simultaneously observed ~20% peak power reduction compared to a baseline implementation.

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“…Some aim to classify activities of elderly people [19], [20] whereas others are used to analyze motion of elite athletes [21]. There are systems to recognize a wide set of daily physical activities such as lying, sitting, standing, walking and running [17]- [20], [22]- [34] and systems for a fine grained analysis of a certain physical activity, e.g. walking along a corridor, upstairs or downstairs [36], [37].…”

Section: A State Of the Artmentioning

confidence: 99%

“… Decision tree (DT) [22], [23], [36]  K-Nearest-Neighbor classifier (k-NN) [23], [29], [33]  Support Vector Machine (SVM) [23], [24], [25], [27], [34]  Neural network [26], [28], [30] Most classification methods require a training of the classifier. As shown in [23] the classifier results in a worse accuracy if it was trained with a data set that was not obtained from the user.…”

Section: A State Of the Artmentioning

confidence: 99%

Accelerometer Based Real-Time Activity Analysis on a Microcontroller

Czabke¹,

Marsch²,

Lueth³

2011

Proceedings of the 5th International ICST Conference on Pervasive Computing Technologies for Healthcare

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In this article we present a new algorithm implemented on a microcontroller for the classification of human physical activity based on a triaxial accelerometer. In terms of long term monitoring of activity patterns, it is important to keep the amount of data as small as possible and to use efficient data processing. Hence the aim of this work was to provide an algorithm that classifies the activities "resting", "walking", "running" and "unknown activity" in real-time. Using this approach memory intensive storing of raw data becomes unnecessary. Whenever the state of activity changes, a unix time stamp and the new state of activity, as well as the number of steps taken during the last activity period are stored to an external flash memory. Unlike most accelerometer based approaches this one does not depend on a certain positioning of the sensor and for the classification algorithm no set of training data is needed. The algorithm runs on the developed device Motionlogger which has the size of a key fob and can be worn unobtrusively in a pocket or handbag. The testing of the algorithm with 10 subjects wearing the Motionlogger in their pockets resulted in an average accuracy higher than 90%.

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Low-power and Low-cost Implementation of SVMs for Smart Sensors

Cited by 15 publications

References 6 publications

Embedded Hardware-Efficient Real-Time Classification With Cascade Support Vector Machines

Embedded Hardware-Efficient Real-Time Classification With Cascade Support Vector Machines

Boosting the Hardware-Efficiency of Cascade Support Vector Machines for Embedded Classification Applications

Accelerometer Based Real-Time Activity Analysis on a Microcontroller

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