Low-Power and Low-Noise Capacitive Sensing IC Using Opamp Sharing Technique

Park, Yunjong; Kim, Hyungseup; Mun, Yeongjin; Ko, Youngwoon; Cho, Dong‐il Dan; Ko, Hyoungho

doi:10.1109/jsen.2016.2606510

Cited by 8 publications

(2 citation statements)

References 5 publications

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“…The next sections explore some circuit-level leakage power reduction approaches for a 6T-SRAM cell. All are accomplished by manipulating the SRAM cell’s terminal voltages in standby mode [ 11 , 12 , 13 , 14 , 15 , 16 ].…”

Section: Implications Of Power Reduction Strategies In Standard Sense...mentioning

confidence: 99%

Novel Low Power Cross-Coupled FET-Based Sense Amplifier Design for High-Speed SRAM Circuits

et al. 2023

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We live in a technologically advanced society where we all use semiconductor chips in the majority of our gadgets, and the basic criterion concerning data storage and memory is a small footprint and low power consumption. SRAM is a very important part of this and can be used to meet all the above criteria. In this study, LTSpice software is used to come up with a high-performance sense amplifier circuit for low-power SRAM applications. Throughout this research, various power reduction approaches were explored, and the optimal solution has been implemented in our own modified SRAM design. In this article, the effect of power consumption and the reaction time of the suggested sense amplifier were also examined by adjusting the width-to-length (W/L) ratio of the transistor, the power supply, and the nanoscale technology. The exact amount of power used and the number of transistors required by different approaches to better comprehend the ideal technique are also provided. Our proposed design of a low-power sense amplifier has shown promising results, and we employ three variations of VLSI power reduction techniques to improve efficiency. Low-power SRAMs embrace the future of memory-centric neuromorphic computing applications.

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Section: Implications Of Power Reduction Strategies In Standard Sense...mentioning

confidence: 99%

Novel Low Power Cross-Coupled FET-Based Sense Amplifier Design for High-Speed SRAM Circuits

et al. 2023

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“…In order to reduce the power dissipation in analog front-ends, different approaches can be adopted. Amplifiers can be shared among different circuit blocks [ 5 ] or stacked to re-use the same bias current [ 6 ]. Individual AC-coupled transistors can be stacked [ 7 ] and self-biased [ 8 ].…”

Section: Lab-on-chip Diagnosticsmentioning

confidence: 99%

Challenges for Microelectronics in Non-Invasive Medical Diagnostics

Carminati

Fiorini

2020

Sensors

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Microelectronics is emerging, sometimes with changing fortunes, as a key enabling technology in diagnostics. This paper reviews some recent results and technical challenges which still need to be addressed in terms of the design of CMOS analog application specific integrated circuits (ASICs) and their integration in the surrounding systems, in order to consolidate this technological paradigm. Open issues are discussed from two, apparently distant but complementary, points of view: micro-analytical devices, combining microfluidics with affinity bio-sensing, and gamma cameras for simultaneous multi-modal imaging, namely scintigraphy and magnetic resonance imaging (MRI). The role of integrated circuits is central in both application domains. In portable analytical platforms, ASICs offer miniaturization and tackle the noise/power dissipation trade-off. The integration of CMOS chips with microfluidics poses multiple open technological issues. In multi-modal imaging, now that the compatibility of the acquisition chains (thousands of Silicon Photo-Multipliers channels) of gamma detectors with Tesla-level magnetic fields has been demonstrated, other development directions, enabled by microelectronics, can be envisioned in particular for single-photon emission tomography (SPECT): a faster and simplified operation, for instance, to allow transportable applications (bed-side) and hardware pre-processing that reduces the number of output signals and the image reconstruction time.

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164 nW Inverter-based capacitive readout IC for microaccelerometer

Kim

Mun

et al. 2018

Microsyst Technol

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Low-Power and Low-Noise Capacitive Sensing IC Using Opamp Sharing Technique

Cited by 8 publications

References 5 publications

Novel Low Power Cross-Coupled FET-Based Sense Amplifier Design for High-Speed SRAM Circuits

Novel Low Power Cross-Coupled FET-Based Sense Amplifier Design for High-Speed SRAM Circuits

Challenges for Microelectronics in Non-Invasive Medical Diagnostics

164 nW Inverter-based capacitive readout IC for microaccelerometer

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