Low-Power and Scalable BEOL-Compatible IGZO TFT eDRAM-Based Charge-Domain Computing

Approach to Low Contact Resistance Formation on Buried Interface in Oxide Thin-Film Transistors: Utilization of Palladium-Mediated Hydrogen Pathway

“…Amorphous oxide semiconductors (AOSs) with extremely low off-currents originating from their electronic structure − have attracted considerable interest for applications in the storage chip industry, enabling the development of capacitorless dynamic random-access memory (DRAM) architecture and high-density DRAM technologies. − In contrast to thin-film transistors (TFTs) for flat panel displays, storage chips employ vertically stacked complex device architectures to achieve higher device density, − posing challenges in electrode processing, and increasing the importance of contact issues between AOSs and electrodes. − Process-derived poor contacts and a substantial Schottky barrier resulting from the intrinsic energy level mismatch between the work function of the electrode metal and the electron affinity of AOSs eventually lead to excessively high contact resistance ( R C ), thereby degrading field-effect mobility and power consumption. Recently, many works have proposed methods to solve high contact resistance between AOSs and metal electrodes, which may be categorized into several main strategies: additional deposition of a highly conductive oxide interlayer, − oxidation of the metal contact surface resulting in the formation of high concentration oxygen vacancies on the AOS contact surface via high-temperature annealing, − penetration of metal ions into the AOS layer, , and surface treatment with plasma. − These methods, which involve high-energy or multistep processes, offer effective solutions for the high contact resistance of the exposed upper surface of oxide semiconductors, as shown in Figure a, but are almost impossible to apply to buried contact or deep vertical interfaces within nanoscale complex structures.…”