Low-power class-AB CMOS OTA with high slew-rate

Kim, Ahreum; Kim, Hyoung-Rae; Park, Yoon-Suk; Choi, Yoon-Kyung; Kong, Bai-Sun

doi:10.1109/socdc.2009.5423790

Cited by 13 publications

(7 citation statements)

References 6 publications

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“…Table 2 compares the performance of this work and the SRE circuits presented in Refs. [6,7]. The proposed SRE circuit consumes 100 times of the standby current of Ref.…”

Section: Simulation Resultsmentioning

confidence: 99%

“…The proposed SRE circuit consumes 100 times of the standby current of Ref. [6], but its slew rate is 200 times that of Ref. [6], improving the settling time from microsecond order to nanosecond order, which is an extreme optimization.…”

Section: Simulation Resultsmentioning

confidence: 99%

“…[6], but its slew rate is 200 times that of Ref. [6], improving the settling time from microsecond order to nanosecond order, which is an extreme optimization. Meanwhile, it consumes almost the same standby current as Ref.…”

Section: Simulation Resultsmentioning

confidence: 99%

“…Thus, several slew-rate enhancement (SRE) methods have been presented to deal with the dilemma between high speed and low power dissipation OE3 11 . In recent publications, Reference [6] uses an adaptive-biasing technique in its class-AB input stage, while Reference [7] adopts an auxiliary monitor circuit to adjust the driving current, and Reference [8] employs a dynamic current bias for a large output current. Unfortunately, some of these systems can hardly operate under a supply voltage below 1.2 V OE3; 7 , or be thorny to achieve unconditional stability because of the positive current feedback OE4; 11 , or only work well for one-stage OTAs OE5; 6; 8 10 .…”

Section: Introductionmentioning

confidence: 99%

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A low-power low-voltage slew-rate enhancement circuit for two-stage operational amplifiers

Shu

et al. 2012

J. Semicond.

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A novel circuit is presented in order to enhance the slew rate of two-stage operational amplifiers. The enhancer utilizes the class-AB input stage to improve current efficiency, while it works on an open loop with regard to the enhanced amplifier so that it has no effect on the stability of the amplifier. During the slewing period, the enhancer detects input differential voltage of the amplifier, and produces external enhancement currents for the amplifier, driving load capacitors to charge/discharge faster. Simulation results show that, for a large input step, the enhancer reduces settling time by nearly 50%. When the circuit is employed in a sample-and-hold circuit, it greatly improves the spur-free dynamic range by 44.6 dB and the total harmonic distortion by 43.9 dB. The proposed circuit is very suitable to operate under a low voltage (1.2 V or below) with a standby current of 200 A.

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“…Table 2 compares the performance of this work and the SRE circuits presented in Refs. [6,7]. The proposed SRE circuit consumes 100 times of the standby current of Ref.…”

Section: Simulation Resultsmentioning

confidence: 99%

Section: Simulation Resultsmentioning

confidence: 99%

Section: Simulation Resultsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

A low-power low-voltage slew-rate enhancement circuit for two-stage operational amplifiers

Shu

et al. 2012

J. Semicond.

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“…Since the current technology node has already crossed the 32 nm limit, the gain factor has become significantly degraded. The problem of gain factor degradation in nanoscale will be a significant hurdle in realizing highly dense integrated circuits [8][9][10].…”

Section: Introductionmentioning

confidence: 99%

Design, simulation and comparative analysis of CNT based cascode operational transconductance amplifiers

et al. 2015

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In this work, design and calibrated simulation of carbon nanotube field effect transistor (CNTFET)-based cascode operational transconductance amplifiers (COTA) have been performed. Three structures of CNTFET-based COTAs have been designed using HSPICE and have been compared with the conventional CMOS-based COTAs. The proposed COTAs include one using pure CNTFETs and two others that employ CNTFETs, as well as the conventional MOSFETs. The simulation study has revealed that the CNTFET-based COTAs have significantly outperformed the conventional MOSFET-based COTAs. A significant increase in dc gain, output resistance and slew rate of 81.4%, 25% and 13.2%, respectively, have been achieved in the proposed pure CNT-based COTA in comparison to the conventional CMOS-based COTA. The power consumption in the pure CNT-COTA is 324 times less in comparison to the conventional CMOS-COTA. Further, the phase margin (PM), gain margin (GM), common mode and power supply rejection ratios have been significantly increased in the proposed CNT-based COTAs in comparison to the conventional CMOS-based COTAs. Furthermore, to see the advantage of cascoding, the proposed CNT-based cascode OTAs have been compared with the CNT-based OTAs. It has been observed that by incorporating the concept of cascode in the CNTFET-based OTAs, significant increases in gain (12.5%) and output resistance (13.07%) have been achieved. The performance of the proposed COTAs has been further observed by changing the number of CNTs (N), CNT pitch (S) and CNT diameter (DCNT) in the CNTFETs used. It has been observed that the performance of the proposed COTAs can be significantly improved by using optimum values of N, S and DCNT.

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Ultra Low Power Improved Differential Amplifier

Fathabadi

2012

Circuits Syst Signal Process

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Low-power class-AB CMOS OTA with high slew-rate

Cited by 13 publications

References 6 publications

A low-power low-voltage slew-rate enhancement circuit for two-stage operational amplifiers

A low-power low-voltage slew-rate enhancement circuit for two-stage operational amplifiers

Design, simulation and comparative analysis of CNT based cascode operational transconductance amplifiers

Ultra Low Power Improved Differential Amplifier

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