Low-power, high-speed 1-bit inexact Full Adder cell designs applicable to low-energy image processing

Zareei, Zahra; Navi, Keivan; Keshavarziyan, Peiman

doi:10.1080/00207217.2017.1357207

Cited by 5 publications

(2 citation statements)

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“…Despite the fact that there is a large number of accurate current-mode FAs in the literature, the current-mode approximate versions are scarce. Recently, Zareei et al (2017) have presented three current-mode 1-bit inexact FAs (Figure 10). In all of them, the output CARRY is produced accurately; however the output SUM is equivalent to NOR, NAND and CARRY in CMIFA1, CMIFA2 and CMIFA3, respectively.…”

Section: Literature Reviewmentioning

confidence: 99%

“…This logic style has many advantages such as low noise sensitivity because of the constant flow of current (Delican and Yildirim, 2011), high speed (Badel et al , 2019), elimination of sign bit by using the direction of current as an interpretation of sign (Jamshidi and Fazeli, 2018), linear addition of current values without active devices (Yanushkevich, 2004), insignificant effects of fan-out circuits by using current mirrors without intensifying output load (Moradi et al , 2015) and simple circuit alteration by employing different threshold detectors (Jiang et al , 2015). These advantages have persuaded circuit designers to use this approach for designing analog and mixed-signal logical and computational blocks (Al-Absi et al , 2013; Beyraghi and Khoei, 2015; Moradi et al , 2016; Zareei et al , 2017). CML has also many other circuit applications such as memory cells, transmitters and frequency dividers (Chiou and Sung, 2019; Lozada and Espinosa, 2017; Tang et al , 2018).…”

Section: Introductionmentioning

confidence: 99%

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High-Performance CML approximate full adders for image processing application of laplace transform

Uoosefian

Navi

Mirzaee

et al. 2020

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Purpose The high demand for fast, energy-efficient, compact computational blocks in digital electronics has led the researchers to use approximate computing in applications where inaccuracy of outputs is tolerable. The purpose of this paper is to present two ultra-high-speed current-mode approximate full adders (FA) by using carbon nanotube field-effect transistors. Design/methodology/approach Instead of using threshold detectors, which are common elements in current-mode logic, diodes are used to stabilize voltage. Zener diodes and ultra-low-power diodes are used within the first and second proposed designs, respectively. This innovation eliminates threshold detectors from critical path and makes it shorter. Then, the new adders are employed in the image processing application of Laplace filter, which detects edges in an image. Findings Simulation results demonstrate very high-speed operation for the first and second proposed designs, which are, respectively, 44.7 per cent and 21.6 per cent faster than the next high-speed adder cell. In addition, they make a reasonable compromise between power-delay product (PDP) and other important evaluating factors in the context of approximate computing. They have very few transistors and very low total error distance. In addition, they do not propagate error to higher bit positions by generating output carry correctly. According to the investigations, up to four inexact FA can be used in the Laplace filter computations without a significant image quality loss. The employment of the first and second proposed designs results in 42.4 per cent and 32.2 per cent PDP reduction compared to when no approximate FA are used in an 8-bit ripple adder. Originality/value Two new current-mode inexact FA are presented. They use diodes as voltage regulators to design current-mode approximate full-adders with very short critical path for the first time.

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Section: Literature Reviewmentioning

confidence: 99%