2016 International Conference on Advances in Electrical, Electronic and Systems Engineering (ICAEES) 2016
DOI: 10.1109/icaees.2016.7888012
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Low power high-speed current comparator using 130nm CMOS technology

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Cited by 5 publications
(2 citation statements)
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“…Any change of that voltage results in frequency offset. [5,13,14]. In this regard, it is imperative to design a charge pump circuit that can generate a steady output current and can produce a superbly matched current with zero error in CPPLL.…”
Section: Introductionmentioning
confidence: 99%
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“…Any change of that voltage results in frequency offset. [5,13,14]. In this regard, it is imperative to design a charge pump circuit that can generate a steady output current and can produce a superbly matched current with zero error in CPPLL.…”
Section: Introductionmentioning
confidence: 99%
“…The two switches drive the loop filters and convert the output signals of the PFD to an analog voltage signal, Vcntrl, to tune the frequency of the VCO. The basic CP circuit suffers from many disadvantages, and as a consequence, several charge pump architectures have been reported with their pros and cons in the literature [14].…”
Section: Introductionmentioning
confidence: 99%