Low-power high-speed rail-to-rail LCD output buffer with dual-path push–pull operation and quiescent current control

Abstract

The present paper addresses a new compact low-power high-speed output buffer amplifier topology for large-size liquid crystal display applications. The suggested buffer achieves fast driving performance, draws a low quiescent current during static operation and offers a railto-rail common-mode input range. The circuit provides enhanced slewing capabilities with a limited power consumption by simultaneously exploiting the push-pull output sections of two basic complementary-type input amplifiers to realize a dual-path push-pull operation of the output stage. An auxiliary biasing network integrated in the input differential stage allows the quiescent bias conditions of the class-AB output stage to be inherently controlled without additional current dissipation. Post-layout simulation results confirm that the proposed amplifier can drive a 1-nF column line load within a 0.9-ls settling time under a 3-V full voltage swing, while drawing only 3.5-lA quiescent current. Monte Carlo simulations are finally carried out, showing a good degree of robustness of the proposed output buffer against process and mismatch variations.

Rail-to-Rail CMOS Voltage Buffer Design for LCD Column Drivers

“…Liquid-Crystal Displays play an important role in portable systems. Column drivers are considered as a significant part of Liquid-Crystal Display (LCD) devices because they contribute to high speed driving, low power consumption and high resolution [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20]. Large size LCD applications can be found in monitors, desktops, TV, car navigation systems etc.…”

“…Another advantage in comparison to class A is also the small static consumption characteristics they possess [18]. Many output buffer circuits were discussed and shown in the literature recent years for power consumption reduction purpose [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20]. The circuit in [17] shows low settling time which is considered an advantage since the speed plays an important role in buffer amplifier; but with a drawback in quiescent current which is considered to be very large.…”